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Old 8th October 2004, 07:46 AM   #1
AndrewT is offline AndrewT  Scotland
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Default Mosfet oscillation or not

I set up a test to measure the cooling capacity of a heatsink.
I used 2 Irf540 in parallel. Each drain fed from 0r5 to positive, sources to negative of a series connected 3A 30v regulated power supply.
I took positive thro' a 15k then 1ko to negative. From the 1ko /15k junction two short leads to the mosfet gates.
Starting from zero volts input all seems OK upto about 24v on each meter. the current and voltage meters tracked accurately. current=0 and total volts now upto 48v, gate voltage about 3v.
Then all went haywire the current started to rise as the gate turn on voltage was passed then the voltmeter readings started oscillating, some reading off scale and sometimes reading 119.5v the currents also went haywire. I checked the volts drop across 0r5 and found sensible readings about 0v5 indicating 1 amp and a total of 2 amps into the pair. but found if the handheld multimeter was placed near the supply cables it too went wonki. Extra decimal places and senseless reading. When I turn down the voltage below about 6v each (total 12v) all returns to normal and is OK until I raise it again to 24v.
I then discovered that the gate to source resistor (1k0) was burning hot to touch. It should have only mA through it.
What is happening?
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Old 8th October 2004, 08:59 AM   #2
Eva is offline Eva  Spain
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I think that only an oscilloscope would reveal what's happening, but it appears to be oscillation due to unexpected negative feedback

Try a capacitor between gate and source
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Old 8th October 2004, 12:32 PM   #3
MikeB is offline MikeB  Germany
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Hi !
You might be surprised how fast you get invisible local/global feedbacks.
As you feed the supplyvoltage via resistors directly to gates, any
ripple from supply gets amplified fed back.
AFAIK regulated PSUs can be put into oscillation this way.
For very high freqs the current into mosfetgate can be very high !

Mike
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Old 8th October 2004, 12:55 PM   #4
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Get everywhere caps ( cca M 1 - 1 M ) : G - S, G - D and D - ground. Short lead.
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Old 8th October 2004, 02:13 PM   #5
EUVL is offline EUVL  Europe
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Default Gate resistor

From what I can gather from your description, you do not have a resistor for each FET between their respective gates to the bias voltage (potential divider 15k/1k), correct ???

The Siliconex application handbook, amongst others, has a detailed description of oscillation behavious of FETs in parallel. Remedies can be -- gate resistor of the order of 200 ohm for each FET before connecting to a common bias point, as little as possible inductance in the gate connections, some inductance at the source.

From my experience, gate resistor is most effective. It basically forms a low pass filter with the input capacitance of the FET as seen at the gate. I have had to use values up to 1k for FETs with very low input capacitance.


Patrick
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Old 8th October 2004, 05:53 PM   #6
AndrewT is offline AndrewT  Scotland
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Hi & thanks for suggestions so far,
I will try adding gate resistors say 220r.
Should I also add cap G to S in parallel with 1k0?
If this fails then it sounds like a battery bias to the gates? & just use the PSU to supply the 0r5 to drain.
I'm trying to get the heatsink up to about 70 or 80 degrees C at about 120w to 180w which the PSU should just achieve.
As an aside, is the Mos oscillation injecting into the feedback of the PSU and causing a similar problem to audio amps without a zobel network ?
regards all & have a good weekend
Andrew T.
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Old 8th October 2004, 06:01 PM   #7
PMA is offline PMA  Europe
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I would support Eva - use a wideband oscilloscope. In another case these are only speculatíons.
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Old 9th October 2004, 12:50 AM   #8
EUVL is offline EUVL  Europe
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Default GS Caps

Hello Andrew,

I also agree that you should confirm oscillation first with a scope. Normally it should be in the few MHz region.

> I will try adding gate resistors say 220r.

This would be the starting point, but don't be afraid to raise the value if it still persists.

> Should I also add cap G to S in parallel with 1k0?

I don't think it is necessary. It is important that you damp the oscillation at the gate of EACH FET to stop any cross interaction between FETs.

> If this fails then it sounds like a battery bias to the gates? & just use the PSU to supply the 0r5 to drain.

Well, it is pure coincidance that this is exactly what I use to match FETs on heatsinks. Use a PSU to supply across DS, a battery (9v) with a trimpot to set bias, and a bipolar capacitor to couple a function generator to swing the output current.

Have a look at Nelson Pass's article on matching. I am away from hone at the moment and do not have this handy, but I am sure someone elase would have it. If not, send me a email in a few days to remind me and I'll see what I can do.

> I'm trying to get the heatsink up to about 70 or 80 degrees C at about 120w to 180w

With 2 FETs ? They won't live long. : )

For TO247 packages, the thermal resistance in the package itself (junction to case) is about 0.9 degC/W, and I definitely would not want to run the junction temperature much higher than 120 degC. So 80 degC heatsink, plus around 10 across mica (2 times worst with Silpad), will leave you about 33W max per FET.

I consider 70degC too high for heatsink, but that's my personal opinion.

Are you finally thinking of something else other than your beloved JLH ? : )


Cheers,
Patrick
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Old 9th October 2004, 12:52 AM   #9
EUVL is offline EUVL  Europe
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And if you are only trying to measure the capability of the heatsink, why not just use 10x 20W ceramic resistors ?

Definitely fool proof. : )

Patrick
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Old 9th October 2004, 01:06 AM   #10
anatech is offline anatech  Canada
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Hi Andrew,
I've done this to match mosfets at different temperatures. I only needed a 100 Ohm resistor to each gate and a cap to ground at the junction point of the resistors. The heatsink was also grounded. I'm not at all surprised at your results. I used a calibration quality voltage source for the gate voltage (to get meaningful measurements).
-Chris
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