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Old 2nd April 2013, 12:37 PM   #781
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Hi Damir,

I know you will get totally different results with models of mainstream transistor.
But what are your results if you use my idealized transistor models?

edit: Anyhow, my point was that (theoretically) the distortion of a so called CFA input stage is much lower than from a VFA input stage.
Why? because the CFA IPS doesn't exhibits the tanh x-fer characteristic, it's far more linear.

Cheers,
E.
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Last edited by Edmond Stuart; 2nd April 2013 at 12:41 PM.
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Old 2nd April 2013, 12:56 PM   #782
dadod is offline dadod  Croatia
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Quote:
Originally Posted by Edmond Stuart View Post
Hi Damir,

I know you will get totally different results with models of mainstream transistor.
But what are your results if you use my idealized transistor models?

edit: Anyhow, my point was that (theoretically) the distortion of a so called CFA input stage is much lower than from a VFA input stage.
Why? because the CFA IPS doesn't exhibits the tanh x-fer characteristic, it's far more linear.

Cheers,
E.
Hi Edmond, could you put your idealized transistor models as text, I could not copy it from the sim file and if I rewrite it manually I could make mistakes.
BR Damir
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Old 2nd April 2013, 01:10 PM   #783
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No problem:

*** NPN Generic
.MODEL N1 NPN (BF=500 CJC=0p CJE=0p IKF=1 IKR=1 IS=20f ITF=10m MJC=500m
+ MJE=500m RC=1m TR=0n VAF=1k VAR=1k VJC=700m VJE=700m VTF=10 XTF=500m)
*** PNP Generic
.MODEL P1 PNP (BF=500 CJC=0p CJE=0p IKF=1 IKR=1 IS=20f ITF=10m MJC=500m
+ MJE=500m RC=1m TR=0n VAF=1k VAR=1k VJC=700m VJE=700m VTF=10 XTF=500m)
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Old 2nd April 2013, 01:24 PM   #784
forr is offline forr  France
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Here I modified my drawing of post #636

I added an ameter, AM15 or AM25, in series with each emitter of the input transistor, T11 for the simplified CFA, T21 for the VFA.

Results are very clear, the input transistors work with equal voltages and currents :

emitter current
CFA --> AM15 873.539 µAdc
88.618 nAac
VFA --> AM25 873.539 µAdc 88.542 µAac

base-emitter voltage
CFA --> VM11 639.91227 mVdc
2.702615 µVac
VFA --> VM21 639.91227 mVdc 2.699602 uVac

base current
CFA --> AM11 8.648904 uAdc
7.534412 nAac
VFA --> AM21 8.648903 uAdc 7.459995 nAac

collector current
CFA --> AM13 864.89033 uAdc
81.083936 nAac
VFA --> AM23 864.89033 uAdc 81.081837 nAac

The output currents of the common node of the feedback resistors R1a-R1b or R2a-R2b are :

CFA --> AM12 97.46077 µAdc 88.618348 nAac
VFA -->
AM22 8.479807 uAdc 5.706717 nAac

VFA --> AM25 88.54183 nAac

With the VFA circuit, the buffering action of inverting input transistor T22 provides the same value of AC current to the emitter of input transistor T21 (AM25)as the value of AC current directly provided by feedback network in the CFA circuit (AM12).

In both cases, the input transistors works with the same variations of Vbe and of emitter current.

If the current variation of the input transistor is considered as being the controlling value, then both are CFAs.
If voltage Vbe of the input transistor is considered as being the controlling value of the device, then both circuits are VFAs. I very much prefer this way which is by far easier to use, for example to quickly evaluate thermal influences.
Attached Images
File Type: jpg Cfa&Vfa2.jpg (196.5 KB, 87 views)

Last edited by forr; 2nd April 2013 at 01:33 PM.
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Old 2nd April 2013, 01:48 PM   #785
dadod is offline dadod  Croatia
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Quote:
Originally Posted by Edmond Stuart View Post
Hi Damir,

I know you will get totally different results with models of mainstream transistor.
But what are your results if you use my idealized transistor models?

edit: Anyhow, my point was that (theoretically) the distortion of a so called CFA input stage is much lower than from a VFA input stage.
Why? because the CFA IPS doesn't exhibits the tanh x-fer characteristic, it's far more linear.

Cheers,
E.
Hi Edmond,
Here with idealized transistors(it sims that idealization work only for FB ).
BR Damir
Attached Images
File Type: jpg Edmond-CFA-idealized.jpg (184.1 KB, 79 views)
File Type: jpg Edmond-CC-idealized.jpg (184.2 KB, 73 views)
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Old 2nd April 2013, 02:33 PM   #786
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Quote:
Originally Posted by dadod View Post
...
it sims that idealization work only for FB ...
BR Damir
Damir

I would think its more apples to apples if you leave the load resistor the same in both cases and adjust in input voltage in the open loop case to result in the same output swing (your simulation has significantly more collector current change in the open loop case).

Thanks
-Antonio
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Old 2nd April 2013, 03:10 PM   #787
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Quote:
Originally Posted by forr View Post
...
Results are very clear, the input transistors work with equal voltages and currents...
Forr,

Try doing the same with a typical cfa complimentary input pair compared to a typical ltp.

For the cfa there is a fixed voltage across the two bases, ignoring the error current flowing into the feedback network (less as this network impedance is increased) then as the input changes the common emitter voltage (the negative input) will also change (a follower) but since there is a constant voltage across the bases the amount of b-e change (in opposite directions) is the same for each transistor. It is the non-linear difference between these b-e voltages than constitutes distortion. Now if you think of these voltages superimposed on the exponential i-v curve of the transistors you will see that given equal and opposite voltage movements from the bias point the resulting change in collector currents for each is significantly different and each is now sitting on a different slope portion of the i-v curve. However it is the difference in these currents which flows through the high impedance gain node and supplies feedback.

In contrast for an ltp, there is no voltage constraint across the bases, but rather a constraint that the sum of collector currents remain constant.
This means that as the input voltage the collector currents will change (equal and opposite amounts). If this is viewed from the same inherent exponential i-v curve then there is an symmetrical delta on the current axis (opposed to the cfa voltage axis) resulting in the inherent non-linear difference in the two be emitter voltages. The difference in these two base emitter voltages is basically the distortion at the feedback point.

The net is an ltp will show much more linear collector currents as a function of vin, with the corresponding exponential appearing as distortion across the base emitters, whereas the cfa will show very linear base emitter changes as a function of vin with the corresponding exponential appearing on the collector currents.

Thanks
-Antonio
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Old 2nd April 2013, 03:39 PM   #788
dadod is offline dadod  Croatia
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Quote:
Originally Posted by magnoman View Post
Damir

I would think its more apples to apples if you leave the load resistor the same in both cases and adjust in input voltage in the open loop case to result in the same output swing (your simulation has significantly more collector current change in the open loop case).

Thanks
-Antonio
Antonio, you were right. Distortion increases from 0.000016% fot the CFA to 0.000046% for the open loop CC.
Damir
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File Type: jpg Edmond-CC-idealized-2.jpg (178.0 KB, 61 views)
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Old 2nd April 2013, 03:49 PM   #789
Bonsai is offline Bonsai  Taiwan
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Good result.
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Old 2nd April 2013, 05:11 PM   #790
RNMarsh is offline RNMarsh  United States
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One of the reasons for a compl push-pull circuit or other totally symetrical topology is so that the distortion will cancel withOut gnfb. The harmonics shown should be .0000000% open or closed loop If the transistors have exactly the same parameters/characteristics. This is not the case with asymetrical topologies which fundamentally rely on ever more gnfb to reduce (but never can attain zero) distortion.

Do you see my point re topologies? One is inherently more ideal to begin with.

Thx-RNMarsh

Last edited by RNMarsh; 2nd April 2013 at 05:18 PM. Reason: SYMMETRY -
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