Optimal source degeneration resistance

[Nick Walker]

How does a designer arrive at the optimum value for Mosfet source degeneration resistors in the output stage?

Typical values range from none at all to 0.5 ohm. Is it a guess or can the optimum value be determined by calculation or measurement?

Presumably the affect on linearity is worthwhile with this local negative feedback, but what are the trade offs as degeneration is increased?

[peranders]

One obvious side effect is higher output impedance and a little loss of output power (which in dB's is nothing....)

[mirlo]

... eats up voltage headroom (probably not an issue in most designs where you can pretty much arbitrarily choose the supply
voltage)

... wastes a little power

I suppose to guess an optimal value, you'd need information about the expected value of the Vgs mismatch between the transistors and their bias network and make the resistor large enough to compensate for that, while not so large that the concerns about loss of gain and power get in the way.

[ashok]

D Self had done some tests on this and included the results in his
book on power amp design. Basically large resistors seem to increase distortion in the cross over region. very low values do not help dc bias stability. Typically the compromise seems to work out around 0.22 ohms or so.

I am not sure how this works out for MOSFETS. But we do see 0.1 to 0.22 ohms in MOSFET designs.

Nick .
How was your HK trip ? Did you go to Apliu Street ?
Cheers,
Ashok.

[millwood]

Nelson used 1ohm in some of his designs. personally, i am in the 0.2 - 0.47ohm crowd.

[acoustixman]

Hi, folks!

I only just stumbled on this 2-year old thread, but wanted to get in my 2 cents worth for posterity...

Resistance inside the feedback loop doesn't count as output impedance, assuming you have high enough open-loop gain to make up for the ballasted stage's transconductance loss under lowest-specified-impedance loading circumstances. Open loop gain is generally ample in most solid-state feedback designs. The error is derived on the basis of voltage AFTER the degeneration resistors and so the circuit will do what it takes to damp the load regardless. I have heard of a claim that high degeneration resistances compromise output stage linearity, but I'd have believe that only if on account of the basic transconductance loss in a case of relatively low open loop gain (which WOULD compressively increase output impedance). Bias stability can only increase with higher degeneration resistance as well. If you use foldback current limiting for output stage protection, it will yield diminishing flexibility (reducing ability to track output device SOA's) with extremely low resistor values.

Worry about output impedance issues if you have low gain or lack negative feedback entirely for whatever reason.

I have used 0.5 ohms (12W per) on my LMOSFET source follower outputs (2 parallelled complementary pairs in class aB). I haven't heard a better-damped amplifier (qualitatively demonstrating low output impedance). The next version will use 0.33 ohms for degeneration, only because of heat dissipation in the 0.5 ohm resistors becoming a potential performance limit with low impedance loads....

Happy listening!!!