"super complementary" topology

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Came across this topology just now. Never seen it before. The idea is that with a normal complementary output stage the NPN and PNP transistor characteristics might not be exact opposites. With this "super complementary" topology though, the upper and lower transistor characteristics are the parallel sum of the each transistor pair. so the upper and lower end up being more or less exactly equal.

Is this circuit in widespread use?
Is it worth a closer look or just no big deal?
 

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Setting R1=R2 is equivalent to assuming that PNP_Q2_Beta=NPN_Q3_Beta. If the betas are not equal then whichever transistor has the higher beta, does most of the work.
That is quite true, but the end result is work done by Q2 + Q3 added together. If it is the same as the bottom pair of transistors then all should be well. In any case, with a conventional topology Q2 and Q3 might be on opposite sides so you problem would presumably be worse.
 
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That is quite true, but the end result is work done by Q2 + Q3 added together. If it is the same as the bottom pair of transistors then all should be well

Then you can save yourself a non-negligible amount of money. If the numerical value of the ratio (NPNbeta/PNPbeta) is unimportant, then save some money by setting the NPNbeta equal to zero: completely remove Q3 and Q7. You will still have (Q2 + Q3) matching (Q6 + Q7); and as post #1 says, "the upper and lower end up being more or less exactly equal."
 
Seems like the simple CFP that has internal gain will serve just as well.

Also, according to Self, you cannot parallel more transistors in CFP output stage as distortion increases unlike the simple EF stage. If this is similar to CFP, you are limited to single output pair.

A simple EF with multiple output pairs might be superior. Particularly if it is a folded 3EF, the Vbe variation due to variation of current of the pre-driver and the driver partially cancels out.
 
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I'm running a paralleled set of CFPs, with no issues nor distortion increase (according to SPICE). You have to have a separate "input" transistor for each (i.e., parallel CFPs, not just the power devices). And remember that the thermally sensitive device in a CFP is the small input transistor (not the big power device) so have the input transistors thermally coupled together.
 
Also, according to Self, you cannot parallel more transistors in CFP output stage as distortion increases unlike the simple EF stage. If this is similar to CFP, you are limited to single output pair.

A simple EF with multiple output pairs might be superior. Particularly if it is a folded 3EF, the Vbe variation due to variation of current of the pre-driver and the driver partially cancels out.

There are challenges paralleling CFPs (ask Sakis). But, better yet, use a CFP - Class AB-C output where you can add as much grunt as you want with MOSFETs whilst retaining a single BJT CFP output at normal listening levels.

http://www.diyaudio.com/forums/solid-state/245619-tgm8-amplifier-based-rod-elliot-p3a.html
 
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