Floating Bias in Leach vs. Slone ??

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I noticed this evening that the Leach "Double Barreled Amp and Slones Opti-MOS use a floating bias in the output driver cascode while Slone does is in the VAS. This is done with a voltage divider between the power rails output. Slone writes that the purpose is to achieve a soft clipping characteristic, while Leach doesn't seem to mention this. Is there any other reason for doing this? Does the Leach get a soft clip effect as well?

I also noticed that the signal from the IS is applied to the outer VAS transistor in Slone's case and the signal from VAS to driver goes to the inner one in the case of Leach. I'm surprise at the Slone approach since he usually seems to go to a lot of trouble to isolate the signal path from the rails - I would have expectedc him to do it other way around.

Anyway, I'm mostly interested in the idea of the floating bias. Is there any disadvantage? Any reason other than soft clipping?
 
sam9 said:
(...)Any reason other than soft clipping?


I believe the reason Dr. Leach did this was purely to stay in the safe operating area of the output stage, halving the Vce of each output device. It was designed in the '70s, and the devices he was using had 150V breakdown, while the rails were about +/-90V. Other high-powered amps of the time, such as Bongiorno's original Ampzilla http://home.kimo.com.tw/skychutw/ampzilla/Ampzilla.htm used similar approaches, though it looks like Bongiorno didn't extend the double drive all the way back to the VAS as Dr. Leach did.
 
sam9 said:
I forgeot to say these are the only places where I've seen this bias method. Is it really that unusual or have I just not looked at evough schematics.

This is cascode connecting the output stage, so that the output transistors don't exceed their second breakdown limit. In the early days, the Vce ratings were on the order of 80-90v for the high power bipolar transistors, and they had to be stacked to handle the 150v of a 200 wpc amp. But even today, bipolars have a breakdown mechanism called second breakdown that requires cascoding if high currents and voltages are present on the device at the same time. The second breakdown limit does not exist for MOSFETs, and this is why they are typically more rugged in high powered amps. You don't have to cascode them, so they simplify the output stages dramatically.

Dynaco used this approach in the mid 70s on the ST-400 amp, one of the biggest of the era. A competing amp from Phase Linear did not use cascoding and was famous for burning out its output stage, second breakdown was not well understood then.
 
The original topic was the contrast between the Leach amp and the Slone. ..."the Leach 'Double Barreled Amp' and Slone's 'Opti-MOS' use a floating bias in the output driver cascode while Slone does his in the VAS".

I was puzzled by this myself. I could be wrong, but it seems useless in the Slone design. There is no need to cascode the VAS, and anyway this is not a cascode, the base of the second transistor is not fixed at a defined voltage with respect to the rails, which it must be to get the benefits of the cascode (no Miller effect, no Early effect). So, I don't get why it's there at all. I also think the bias voltage generator is weak, just a resistor, and the MOSFET gates need overvoltage protection, which is missing.

On balance, most of the designs in the Slone book make excellent sense. This little part of the high end design did not. I violently disagree with Douglas Self's complete dismissal of MOSFETs for output stages, so I was pleased to see Sloan using them where they work best: in higher power amps that would require cascoding with bipolars, such as the Leach "Double-Barrelled Amp". They really simplify the output stage, if you can work around the matching issues (pretty straightforward).

Anyway, I'm still wondering myself why the VAS is cascoded in the Optimos.....
 
I wondered the same thing, I built an Optimos dual mono amplifier last year and replaced the floating bias with a standard regulated zener.

I originally did this because I was having some problems with oscillation and so simplified everything. However after I fixed the original problem, I just needed larger Mosfet gate resistors, I saw no need to reinstate the floating VAS bias. Instead I changed the gain to give a full undistorted signal for the max input I knew my sources would supply, thus no need for the floating bias. The amp sounds great.
 
Nick Walker said:
I wondered the same thing, I built an Optimos dual mono amplifier last year and replaced the floating bias with a standard regulated zener.

I originally did this because I was having some problems with oscillation and so simplified everything. However after I fixed the original problem, I just needed larger Mosfet gate resistors, I saw no need to reinstate the floating VAS bias. Instead I changed the gain to give a full undistorted signal for the max input I knew my sources would supply, thus no need for the floating bias. The amp sounds great.

This is interesting. I have considered building an OptiMos, but
haven't figured out why the floating bias for the cascode. Maybe
it has something to do with soft clipping as suggested earlier
in the thread, but it also takes away some of the benefits of
cascodes, so I have also considered fixing the bias voltage, or
rather make a jumper selection for the two choices.
 
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slowhands said:
This is cascode connecting the output stage, so that the output transistors don't exceed their second breakdown limit. In the early days, the Vce ratings were on the order of 80-90v for the high power bipolar transistors, and they had to be stacked to handle the 150v of a 200 wpc amp. But even today, bipolars have a breakdown mechanism called second breakdown that requires cascoding if high currents and voltages are present on the device at the same time. The second breakdown limit does not exist for MOSFETs, and this is why they are typically more rugged in high powered amps. You don't have to cascode them, so they simplify the output stages dramatically.

Dynaco used this approach in the mid 70s on the ST-400 amp, one of the biggest of the era. A competing amp from Phase Linear did not use cascoding and was famous for burning out its output stage, second breakdown was not well understood then.

The Threshold 800a went over the edge with a triple stack. I
don't think anyone else got that crazy, but it kept the outputs
out of second breakdown with the high bias currents, worked
fine and didn't break.

You can download the schematic from:

www.passlabs.com/temp/800a_schem.tif

Also of interest there is the dynamic bias circuit.
 
Slone definiately says the floating bias is for soft clipping. I spoke once on the phone with him regarding something else, but the conversation drifted to the opti-mos -- if I recall a benefit over other soft clip circuits such as NAD or oppossed diode a la guitar amps is that there is no addes distortion until you are very near the clipping point.

About a year ago I tryed putting the whole Opti-Mos in to SImetrix and the soft clip showed up in thr transient analysis. But here is what is a mystery: the same idea in BJT amp or even a simpler L-MOSfet amp does not indicate soft clipping. I suspect there is more to it than just floating the bias. If so, I guess Slone is keeping quiet about it - which is reasonable since he is trying to get a commercial version into the market. The Opti-MOS has a fairly elaborate IS; perhaps there is something going on there that makes the thing work. I've switched to LTSpice and don't have the OPTI-MOS file any more, but hope to eventually get around putting it into LTspice to see if I can figure why and under what circumstances the soft clipping works.

I like Nick Walkers attitude -- build is so you never get in to clipping in the first place!
 
sam9 said:
Slone definiately says the floating bias is for soft clipping. .....


Negative feedback will drive the amp into "hard clipping" as it bumps up against the rails, that's how it should work. Unfortunately a lot of amps will saturate clipped which causes slow recovery coming back down.

Another example of negative feedback magnifying a defect is the hash caused when protection circuits kick in. They "clip" the signal, so there is more feedback, causing harder clipping and so on. The protection circuit maximizes distortion when it kicks in, due to the reaction from the feedback loop.

So I don't agree with the soft clipping effect here, but it's a nice concept.
 
The phenomonon you refer to is called "rail sticking" by some. I've seen it both caused and cured by choice of output device and changes to the gain in VAS. (One cure, a Baker clamp which has little to do directly with NFB or gain, was treated in another thread.) I suppose the closed loop gain set by the global NFB configuration could effect it too.

While nearly any discussion that involves gain can be restated in terms of feedback, doing so seems too awkward for my brain. Besides which it then tends to degenate into one of those "NFB is bad - "no it isn't" - "yes it is" debates that obscure more than illuminate.

With regard to the Opti-MOS specificly, I just rrewalized that the opossed zeners at the input can act as a crude soft clipping device depending on the level of the input signal, the amplifier's gain and the rail voltage. I've something similar in guitar amps sometimes calkled "overdrive". When I get back to the Opti-MOS and the floating bias question, I'm going to see how the thing behaves with and without the zeners because now I'm not so sure the floating bias is the whole story or even "the story" at all.
 
Since I already had a Spice model of the OptimMOS from previous
occasions, I made som quick tests with floating bias vs. fixed
bias for the VAS cascodes. Judging from the simulations, the
floating bias does give some soft-clipping behaviour, but a
very marginal one, which is probably why I never realized that
could be the reason. The effect seems so small that I doubt
it servers much purpose.

However, thinking about this there mght be also another reason.
If we use a fixed bias, we will have to use a very small Vce for
the VAS transistors or use a larger Vce and pay this with less
output power and more power dissipation in the OPS. Using a
small Vce has the drawback of working outside the linear region
for the transistors, which will give more distorsion. Using the
floating bias method, we will have a large Vce until we get close
to clipping, so although we lose some linearity (well, the gurus
seem to disagree on this anyway :) ) we will for all but high
output levels probably have much less distorsion than if running
with a fixed but very low Vce.
 
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