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Old 30th January 2004, 06:04 PM   #1
pjacobi is offline pjacobi  Germany
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Default Borbely Fet Follower SPICE modeling

This is for the SPICE modeling related discussions, which started in the "Borbely Fet Follower" thread.

Let's avoid annoying the thread starter and others, who want to see practical issues, real circuits, discussed in that thread.

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Peter Jacobi
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Old 30th January 2004, 06:12 PM   #2
pjacobi is offline pjacobi  Germany
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Hi Frederico, All,

Quote:
Originally posted by pjacobi
.model 2sk170 NJF(Beta=51.76m Rs=8.008 Rd=8.008 Betatce=-.5 Lambda=11.22m
+ Vto=-.5275 Vtotc=-2.5m Cgd=18.28p M=.3367 Pb=.3905 Fc=.5
+ Cgs=20.07p Isr=112.8p Nr=2 Is=11.28p N=1 Xti=3 Alpha=10u Vk=100
+ Kf=92.85E-18 Af=1)
Quote:
Originally posted by fscarpa58
using Micro-Cap 7
you can obtain
the 3 curves of post #60
with any generic njfet model
by putting IS= 1n , 15 p, 10F
respectively for curves 1,2 and 3.

I think gate current is not well
modelled here

I am disappointed
I've cross-checked with AIMSpice. Results are in agreement with Micro-Cap 7 results, i.e. not satisfactory.

Actually looking at the diagnostics, I can see that about half of the parameters are rejected as unknown. So there's no big guess, what 's happening.

Seems LTSpice is state-of-the-art regarding JFET modeling.

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Peter Jacobi
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Old 30th January 2004, 06:34 PM   #3
pjacobi is offline pjacobi  Germany
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Hi Christer,

Quote:
Originally posted by Christer
For instance, with 10kHz 5V pk input, I got -94dB 2nd order
and -117dB 3rd order. With 100mV pk input I got basically no
visible distorsion above the -155dB noise floor of the FFT.
Those are just simulation figures, but they seem promising.
If you operate a x1 stage at +-24V, and you don't do something really strange, it's nearly impossible to get worse than -150dB for 100mV pk signals.

O.K. There may be a bareley visible K2 spike. But everything above starts at least with a bonus factor of 1/240 * 1/240 before even taking anything into account that makes the circuit well-behaved.

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Peter Jacobi
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Old 30th January 2004, 07:01 PM   #4
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Peter,

You started this thread before I made my recent post in the original
thread. As I pointed out there, Spice modelling was not really the
issue, but other people seemed to make it the issue, or assume it
was the issue. As I also said there, the distorsion figures should be
taken with a very large grain of salt. I think we can expect a real
circuit to have at least as much distorsion, but otherwise I am not
sure if we know much. I do think distorsion analyses in Spice can
serve a purpose for comparative purposes of the kind we discussed
in the Diamond buffer thread, but that is an assumption.

Just for the record, I see you put "Borbely FET follower" in the thread
title. Actually, the circuit wasn't one of Borbelys' but rather what I
understand to be John Curls own variant of the White follower.
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Old 31st January 2004, 08:00 AM   #5
pjacobi is offline pjacobi  Germany
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The riddle of the gate current simulation differences is solved.

It's the JFET impact ionization current, see:

http://www.google.com/search?hl=en&l...=Google+Search

Its modeling appeared first in PSPICE and didn't migrate to all other SPICES.

Reading the name alone, it should best be avoided, I assume. Which correlates with the practitioners' advice seen in the mother thread.

Regards,
Peter Jacobi
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Old 1st February 2004, 04:18 PM   #6
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Hi

Thanks Peter for the search

However I think that static curves of
ID versus VDS are more important in
distortion analysis. look at the difference
between M-Cap and the Toshiba sheets

Amazing


Federico

Toshiba curves
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Old 1st February 2004, 04:20 PM   #7
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MicroCap curves

I think it will be better to use
pentode models

Federico
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Old 1st February 2004, 04:57 PM   #8
pjacobi is offline pjacobi  Germany
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Hi Federico, All,

Quote:
Originally posted by fscarpa58
[...]
However I think that static curves of
ID versus VDS are more important in
distortion analysis. look at the difference
between M-Cap and the Toshiba sheets
[...]
JFETs, the neglected stepchild of SPICE modeling?

Perhaps some advanced MESFET models can be abused for better results, when it is possible to selectively disable the GaAs specific effects.

Anyway, careless parameter extraction is to blame for the huge differences seen in your posts.

Compare these Philips models with the datasheets:

.MODEL BF245A NJF(VTO=-1.7372 BETA=1.16621E-3 BETATCE=-0.5 LAMBDA=1.77211E-2
+ RD=9.01678 RS=9.01678 CGS=2.20000E-12 CGD=2.20000E-12 PB=7.80988E-1 IS=2.91797E-16 XTI=3 AF=1
+ FC=0.5 N=1 NR=2 MFG=PHILIPS)

.MODEL BF245B NJF(VTO=-2.3085 BETA=1.09045E-3 BETATCE=-0.5 LAMBDA=2.31754E-2
+ RD=7.77648 RS=7.77648 CGS=2.00000E-12 CGD=2.20000E-12 PB=9.91494E-1 IS=2.59121E-16 XTI=3 AF=1
+ FC=0.5 N=1 NR=2 MFG=PHILIPS)

.MODEL BF245C NJF(VTO=-5.0014 BETA=5.43157E-4 BETATCE=-0.5 LAMBDA=2.71505E-2
+ RD=1.20869E1 RS=1.20869E1 CGS=2.00000E-12 CGD=2.00000E-12 PB=1.24659 IS=3.64346E-16 XTI=3 AF=1
+ FC=0.5 N=1 NR=2 MFG=PHILIPS)

This almost makes sense, doesn't it? Add impact ionization current to prevent designers setting Vds too high, and the models would be good enough for most simulations.

Compare with power BJTs. Almost no models implement quasi-saturation. Didn't stop us from using them. Hexfets? If used in class B amplifiers, devices spend signifant part of the cycle in weak inversion, but you'll find models which doesn't model diffusion current at all!

Regards,
Peter Jacobi
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Old 1st February 2004, 09:28 PM   #9
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Peter,

Although I haven't really investigated that many manufacturers
models, my impression is that also BJT model are often mediocre
at best when compared to the datasheets. I spent quite some
time about a year ago trying to DIY models for some BJTs I couldn't
find any Spice models for. I tried to really understand the Spice
equations as described in my, admittely somewhat old, semiconductor
physics book, and figure out both by theoretical thinking and by
epxeriments with tweaking parameters how to create a good model.
It may be my due to limitations in my understanding, but I really
couldn't find any way either in theory or in practice to come up
with a suffciently good general-purpose model of any of these
BJTs. I ended up having to make a compromise fitting neither of
the most importand diagrams really well nor any of them
really bad. Some improvement could be achieved if tailoring the models
to the intended operating conditions, but some parameters seem
still impossible to model well. I couldn't find any way to get the
high injection effects (beta droop) as serious as often indicated
in the datasheets. There might be further parameters in some
modern Spice implementations that improve on this, but if so
they seem not to be standard Spice 3.
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Old 1st February 2004, 09:51 PM   #10
pjacobi is offline pjacobi  Germany
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Hi Christer,

Quote:
Originally posted by Christer
[...] my impression is that also BJT model are often mediocre
at best when compared to the datasheets. [...] but I really
couldn't find any way either in theory or in practice to come up
with a suffciently good general-purpose model of any of these
BJTs. [...] I couldn't find any way to get the
high injection effects (beta droop) as serious as often indicated
in the datasheets.[...]
You've done something I always planned to but it never got the top of priority list. As always I'll comment anyway.

- Not perfectly modeling beta droop shouldn't be a problem, as it is easy to operate all your devices below the F(transit) peak (in DIY, as you don't have to optimize your part cost)

- You have IKF, base and collector resistances as the most straightforward ingredients to model beta droop. Want to share one your attempts? I'll have a look on it.

- OTOH you can't avoid quasi-saturation, I'll consider this much more problematic

- If you have time and a C compiler at hand, you can experiment with the Philips MEXTRAM model for BJT:
http://www.semiconductors.philips.co...polar/mextram/

Regards,
Peter Jacobi
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