How to match MJL3281A?

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Output transistors of the same type, appearing in parallel in push pull amps, should be matched on two parameters for best results, not just one.

The matching process should be done at the intended bias current the amp is to be set up to; in my amps I choose 58mA. The devices should be matched for current gain and base/emitter voltage.

I built a simple jig with a current source and a differential amplifier which supplies this current to the transistor under test and sets up an appropriate base drive to the DUT to ensure a prescribed voltage across the transistor with the chosen collector current. The differential pair senses a reference voltage of half the Vcc (I use a 12V gelcel battery), and adjusts the bias on the base of the device under test (DUT) to ensure half the Vcc between collector and emitter. There is a 100R resistor in series with the base of the DUT so you can measure the voltage drop across it, giving the current through into the base by Ohms Law and thus permitting the operator to figure the beta of the DUT from beta = Ic / Ib.

Once stable, first measure the base/emitter voltage of the DUT.

Using a sample of 100 or so devices, categorize them in small piles by Vbe on a large sheet of butchers paper. Write down the Vbe in millivolts for each pile, ensuring it is easily visible. Remember, this is at a prescribed current with around 6V across the collector/emitter.

You need to work reasonably quickly (less than two seconds) to avoid warming the junction too much, as the gain and the Vbe rises rapidly with temperature.

A fast sampling rate on the DMM is essential, as is a fresh battery. In a sample of 100, you will get an approximately normal distribution of Vbe, and these can be sorted right down to the nearest millivolt, very accurately since 1mV in 600mV is a snap on most DMMs.

Once you have multiple piles, all classified by Vbe, you then go through each pile searching for betas within 5%. For this you move the DMM probes to the 100R base stopper. The higher the reading, the lower the beta, given by 5800 divided by mV. (58mV is a beta of 100).

In this way you finish up with matched pairs which will turn on and off together and which will pass pretty much identical collector currents as well. This pays dividends in the final sound, as switching noise is much reduced. Generally I can accurately matched 60% of a batch of 100 Toshiba 5200/1943s in about forty minutes. The accuracy depends, of course, on the quality of your DMM. Make sure the battery is good!

I know well that matching LIKE devices on a push pull amplifier with multiple output pairs is crucial to good sonics. However, I was not aware that matching PNP with NPN, difficult since each transistor's transfer characteristics are appreciably different, improved the sonics. Anyone care to comment on this, and why?

Cheers,

Hugh
 
AKSA said:

I know well that matching LIKE devices on a push pull amplifier with multiple output pairs is crucial to good sonics. However, I was not aware that matching PNP with NPN, difficult since each transistor's transfer characteristics are appreciably different, improved the sonics. Anyone care to comment on this, and why?

This doesn't necessarily explain the sonic difference, but at least
measurement differences, I think. I made some Spice simulation
on a discrete diamond buffer, which has push-pull follower
output so the results should carry over to any such output
stage, I think. Since we usually only match only beta and/or
Vbe, I used the simplest standard transistor model in Spice,
neclecting all other parameters in order to pinpoint the effects
of differences in these two parameters. These are only
simulations with ideal models, so don't bother about the
absolute values, but the relative qualitative differences should
be correct at least as far as I can see.

With a perfectly matched output pair I got no even order
distorsion at all (simulation noise floor was probably at
-120 or -140 dB), and I got -81dB 3rd order distorsion (haven't
kept records of the higher orders). Mismatching beta a factor 2
gave -88dB 2nd order and still -81dB 3rd order. Mismatching
a factor 4 gave -86dB 2nd order and still -81dB 3rd order.

I then kept beta identical and instead varied Is, which determines
the Vbe characteristic. A mismatching of a factor 2 in Is still
gave no difference in 3rd order but gave -114dB 2nd order.

One shouldn't pay too much attention to the exact figures,
especially since I neglected all other parameters. However,
I think one can draw the conclusion that perfectly matched
devices (almost) cancel all even order distorsion, while
mismatching the devices adds even order distorsion but
keppt the odd order distorsion (almost) unchanged.

What this means for sound, that is a different issue. Given
that matching improves sonics as you say, this is contrary
to the school who claims that even order distorsion improves
sonics by masking odd order distorsion. Maybe that is just a
matter of preference. It would be interesting if someone with
access to a good spectrum analyzer could make some
practical experiments to see if the simulations correlate with
real-world behaviour.
 
Christer,

This is extremely interesting, but oddly it doesn't correlate very well with what one hears when comparing matched v. unmatched output devices. Well matched LIKE devices with a couple of output pairs gives huge vitality and detail, but even a mismatch of Vbe by say 10mV and beta of 25% gives a flat, boring, uninspiring sound lacking in vitality or impact.

I would have thought that beta differences will manifest as H2, certainly, because the two device pairs are passing different currents, creating waveform asymmetry and thus H2.

But Vbe differences will affect the time at which each device switches on (and off). At this very critical dead zone period, a few degrees above and below the zero volt datum, the swiftly tapering transfer curves are conjugate but not aligned. If two like devices switch on at different times, this event is now characterized by two glitches, not one (this assumes that precisely as a PNP turns on, the corresponding NPN turns off, which may even be in error!), and during these events negative feedback is largely ineffective because feedback signals are extremely fast and error signals very weak.

I would therefore be looking at the nature of the transfer function for signals as they traverse +1.3V to -1.3V, and how it is affected by poor 'like' device matching, vis a vis PNP v. NPN. I really think it's the switching we are hearing, not the H2/H3 mix, which is necessary much slower and not too unmusical anyway. In fact, the artefacts around the crossover disjunction would, I'd guess, be creating very low level artefacts in the H5, H7, and H9 range, if not higher. The ears are demonstrated to possess very high sensitivity to these harmonics, of course. Sadly the global feedback loop can never correct for this sort of crud.

Cheers,

Hugh
 
Hugh,

I just realized from your answer that I shold have pointed out
one thing. The diamond buffer, which I simulated, runs in
class A, so the results do not immediately transfer to class AB/B.
Sorry for that. It would be interesting to do something similar
for the latter case too, but then
also the bias may affect even the relative differences. I might
try to do this some day when my CPU has nothing better to do. :)

We will most certainly get also even order distorsion from
matched pairs in class AB/B, but the spectral changes from
mismatching would be interesting.
 
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Joined 2003
AKSA said:
I would have thought that beta differences will manifest as H2, certainly, because the two device pairs are passing different currents, creating waveform asymmetry and thus H2.

Hugh

not necessarily true. In the JLH type push-pull (class a), the output current is the differential of the current from the two devices (emitter current for the upper output device minus the collector current of the lower output device). So you can certainly afford to have a beta mismatch without impacting the output. In a typical class b type push pull, however, any mismatch would manifest into asymmetrical waveform.

I did a slightly different simulation of the jlh output stage with "ideal" transistors: current driven current sources. and there is very minor performance differences when the "betas" (current gains) of the two devices are varied (from 4:1 to 1:4 as I recall) and there is little performance difference even in open-loop operations.

with beta mismatch will do to a jlh output is DC offset (before the coupling cap). a small beta for the upper output device, for example, will translates into lower output (DC) voltage, and vice versa. But they shall have no impact on AC output.

Also, the idle current on the two JLH output transistors will be identical (ignoring the currenting going to the input transistor), no matter how mismatched the beta is.
 
AKSA said:
Christer,

Thank you for your reply. See it now!

Hugh,
I think it would be very interesting to do some similar
studies also of class AB mismatching, and I got time to do a few
brif pilot studies earlier today. However, there are certain
important parameters and questions to consider. The first is
what bias currents to simulate for, it would be very very tedious
to find an optimal value by simulation, so I guess I have to
limit it to a few sample values. Another thing I immediately
realized (obvoius in retrospect) is that keeping the bias voltage
fixed and then mismatching Vbe will give a different bias current,
which affects the results. What is your opinion here, should we
go for the same bias voltage in both cases or the same bias
current in both cases? Also, for a starters my intention is only
to bother about beta and Is (ie. Vbe), but I suppose other
important parameters in the class AB case may be indirectly
dependent on these parameters. I'll see if I can get some grasp
on that from my semiconductor physics book. Further there is
also the question whether to simulate with or without emitter
resistors, and if so what values. Ah, and I almost forgot, since
we are presumably mostly interested in switching and crossover
distorsion, I suppose it is more interesting to do the simulations
for small signal levels, right?

I'll have to try
being somewhat economic with the number of simulations since
large signal FFT analysis with a decent noise floor are quite CPU
intensive (and each of them also takes some time for the
human operator, ie. me). Yours and others opinions on these
issues are most appreciated.
 
Hi Christer,

Thank you for your willingness to model this very interesting situation in Class AB design.

Somewhat sheepishly I have to admit to special interest in the following conditions:

1. Constant bias current of 58mA
2. 2SC5200/2SA1943 outputs (with 4793/1837 drivers)
3. 215R and 0.1uF between the driver emitters
4. 0R47 emitter resistors
5. 8Vpp (1 watt into 8R)

These are certainly real world values which work well in a practical amplifier. Since the adjustable aspect of any amp is bias, and this should track well with a suitable Vbe multiplier thermally attached to the output, it makes good sense to model behaviour on this set of parameters.

Again, my thanks,

Cheers,

Hugh
 
Hugh,
thanks for your suggestions. Actually, I primarily intended to
use more ideal components than real ones, to try avoiding
too many parameters in attempt to pinpoint just the matching/
mismatching behaviour. Further, I concentrate on just an OPS
driven by ideal voltage sources for both signal and bias to
try making the results neutral from the topology of driver and
VAS stages etc. Maybe that is abstracting too far, we'll see.
I don't mind doing experiments with real transistor models too,
but I have a serious shortage of models for good power BJTs,
for instance those ones you suggested. I do have models for
the drivers, though, but only because I've DIYed such models
myself. They seemed not available anywhere.

I have spent quite a lot of CPU hours today making some initial
experiments, but so far I seem not to get any interesting results.
I don't know if it is because of using too idealized and simplified
BJT models, or for some other reason. I'll think more about it
and post something on my "test rig" for comments later on.
Maybe we should start a new thread on this topic?

Regarding those suggestions of yours, are you actually revealing
some "secrets" about your amps here? ;)
 
AKSA said:
I built a simple jig with a current source and a differential amplifier which supplies this current to the transistor under test and sets up an appropriate base drive to the DUT to ensure a prescribed voltage across the transistor with the chosen collector current. The differential pair senses a reference voltage of half the Vcc (I use a 12V gelcel battery), and adjusts the bias on the base of the device under test (DUT) to ensure half the Vcc between collector and emitter. There is a 100R resistor in series with the base of the DUT so you can measure the voltage drop across it, giving the current through into the base by Ohms Law and thus permitting the operator to figure the beta of the DUT from beta = Ic / Ib.

Hugh,

I'm having a mental block, and I can't seem to visualize how it is connected. Could you or someone else draw a schematic?

Thanks.
 
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