Just a suggestion.
Removing L1,R25 you have more room and probably a more symmetrical pcb.L1,R25 will be nice sitting on output connectors.
Removing L1,R25 you have more room and probably a more symmetrical pcb.L1,R25 will be nice sitting on output connectors.
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Hi Prashi
Visually this PCB is really starting to take shape. If you fix the dimensions exactly at 75x75 and then horizontally centre the ground & speaker lugs and output coil, it will have a nice symmetry to the layout.
If you move the input biasing circuity (except Q2 - leave that *exactly* where it is next to Q1) up to the top right corner, you should have room to to vertically centre the output transistors once you push and pull the remaining components underneath.
Q1 really needs to be kept away from heat sources in order to minimise thermal drift, which will cause the DC offset to wander. Q3 is one such heat source and I would like to see a little more space between it and Q1/Q2. One trick I often use is to position the feedback shunt cap (C4 on this schematic); generally a physically large component close to the input transistor(s) and within "line of sight" of the major heat sources: output transistors, drivers, VAS, etc.
What power output, hence rail voltages, are we targeting for this particular implementation? The values specified give about 27dB gain resulting in full power with about a 1V input for the 25V rails I spec'd it for. If we want to specify higher voltage rails (the outputs will take it) then it wouldn't be a bad idea to increase the gain.
It would be a good idea to add an emitter resister to Q2, about 10-22R. R10 could be increased to about 100k.
Hugh, I'm going to have to get back to you re. the 3.3V diode into the bias generator once I've done some more testing. I'm worried it will under compensate - plain red or perhaps green led is the best compromise in my experience.
Visually this PCB is really starting to take shape. If you fix the dimensions exactly at 75x75 and then horizontally centre the ground & speaker lugs and output coil, it will have a nice symmetry to the layout.
If you move the input biasing circuity (except Q2 - leave that *exactly* where it is next to Q1) up to the top right corner, you should have room to to vertically centre the output transistors once you push and pull the remaining components underneath.
Q1 really needs to be kept away from heat sources in order to minimise thermal drift, which will cause the DC offset to wander. Q3 is one such heat source and I would like to see a little more space between it and Q1/Q2. One trick I often use is to position the feedback shunt cap (C4 on this schematic); generally a physically large component close to the input transistor(s) and within "line of sight" of the major heat sources: output transistors, drivers, VAS, etc.
What power output, hence rail voltages, are we targeting for this particular implementation? The values specified give about 27dB gain resulting in full power with about a 1V input for the 25V rails I spec'd it for. If we want to specify higher voltage rails (the outputs will take it) then it wouldn't be a bad idea to increase the gain.
It would be a good idea to add an emitter resister to Q2, about 10-22R. R10 could be increased to about 100k.
Hugh, I'm going to have to get back to you re. the 3.3V diode into the bias generator once I've done some more testing. I'm worried it will under compensate - plain red or perhaps green led is the best compromise in my experience.
A few more points:
- That 1W resistor is going to be pretty marginal during load testing with 35V or higher rails that I suspect most constructors will use. In any case, the quality of this resistor is paramount, and it is a bit difficult to find quality 1W rated precision film resistors. Better to include pads for two 2.2k 600mW parts. The gain will be a little higher but that is of little consequence.
- C4 is a little too small for lowest distortion. You might like to make provision for a cap with 5mm pin spacing and that way a more suitable 2200uF cap can be substituted.
- Similarly, C6, C14 and C15 are about the smallest that will give acceptable results. If you have enough space, I suggest you lay in pads to suit 220uF or 470uF caps.
- That 1W resistor is going to be pretty marginal during load testing with 35V or higher rails that I suspect most constructors will use. In any case, the quality of this resistor is paramount, and it is a bit difficult to find quality 1W rated precision film resistors. Better to include pads for two 2.2k 600mW parts. The gain will be a little higher but that is of little consequence.
- C4 is a little too small for lowest distortion. You might like to make provision for a cap with 5mm pin spacing and that way a more suitable 2200uF cap can be substituted.
- Similarly, C6, C14 and C15 are about the smallest that will give acceptable results. If you have enough space, I suggest you lay in pads to suit 220uF or 470uF caps.
Very good job Prasi![]()
Thanks a lot Valery, Coming from you, means a lot for me.
reg
Prasi
Dear Prasi,
When you post corrected PCB lay out again, Please also post the latest schematic side by side for easy reference as you have done above in Post #300. Please Continue updating the Revision Nos and keep same numbers for schematic and PCB.
--gannaji
When you post corrected PCB lay out again, Please also post the latest schematic side by side for easy reference as you have done above in Post #300. Please Continue updating the Revision Nos and keep same numbers for schematic and PCB.
--gannaji
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A few more points:
- That 1W resistor is going to be pretty marginal during load testing with 35V or higher rails that I suspect most constructors will use. In any case, the quality of this resistor is paramount, and it is a bit difficult to find quality 1W rated precision film resistors. Better to include pads for two 2.2k 600mW parts. The gain will be a little higher but that is of little consequence.
- C4 is a little too small for lowest distortion. You might like to make provision for a cap with 5mm pin spacing and that way a more suitable 2200uF cap can be substituted.
- Similarly, C6, C14 and C15 are about the smallest that will give acceptable results. If you have enough space, I suggest you lay in pads to suit 220uF or 470uF caps.
Hi Christian,
Here is the modified layout. I think this may as well be the one that will satisfy the criteria set out by Hugh and yourself (hopefully). Size is further reduced to 69mm height. now the o/p are almost at center, only about 8-9mm offset towards the top.
-1W resistor, I have increased the size to 4.6mm x 15.24mm. one may also piggy back two 0.6W resistors, if required, i think.
-C4: both 3.5mm and 5mm pitch options included.
-C6,14 and 15 sizes increased to 10mm diax3.5mm pitch. 100uF, 220uF and 330uF will fit. may be difficult to find 470uF.
and yes emitter resistor for Q2 (22R ) included.
How does it fare now?
reg
Prasi
Attachments
Hello Prasi
greetings very nice layout maybe i will try it out on veroboard
warm regards
Andrew
greetings very nice layout maybe i will try it out on veroboard
warm regards
Andrew
Perfect!Hi Christian,
Here is the modified layout. I think this may as well be the one that will satisfy the criteria set out by Hugh and yourself (hopefully). Size is further reduced to 69mm height. now the o/p are almost at center, only about 8-9mm offset towards the top.
-1W resistor, I have increased the size to 4.6mm x 15.24mm. one may also piggy back two 0.6W resistors, if required, i think.
-C4: both 3.5mm and 5mm pitch options included.
-C6,14 and 15 sizes increased to 10mm diax3.5mm pitch. 100uF, 220uF and 330uF will fit. may be difficult to find 470uF.
and yes emitter resistor for Q2 (22R ) included.
How does it fare now?
reg
Prasi
Now post the parts empty Black&White. and the Eagle files just in case.😉
May be singing is a job for this weekend.😱
Perfect!
Not so fast!! 🙂
Prasi, move C11 and C14 above the NMOS so they are in symmetry with C13/C15. You should then be able to line up R's 16, 12, 15 & 18.
Rotate R5 by 90 degrees so that it is in line with C2.
Pay particular attention to caps that are in close proximity to resistors that pass high currents. Try to put some space between them. For example, as it stands, C15 is going to cook while load testing or under heavy sustained usage.
Hi, assuming a layout similar to Prasi's, I 'll dare to ask if the bias transistor is better placed on the MOS, on the BJT, or if it is indiferent and only matters the shortest possible flying leadsLocating this BD139 on the output device is best done with flying leads, OR, if you can do it, contiguous with the output device, using the same mounting bolt.
Yes either outputs since their thermal stress will be almost the same and if both TO3P packages are used the temperatures will also the same.
Hugh
Hugh
Not so fast!! 🙂
Prasi, move C11 and C14 above the NMOS so they are in symmetry with C13/C15. You should then be able to line up R's 16, 12, 15 & 18.
Rotate R5 by 90 degrees so that it is in line with C2.
Pay particular attention to caps that are in close proximity to resistors that pass high currents. Try to put some space between them. For example, as it stands, C15 is going to cook while load testing or under heavy sustained usage.
Thanks again for the valuable suggestions. C14 and C15 can now also be 470u as 13mm dia x 5mm pitch caps can also be fitted but will extend slightly outside of PCB, I think that's okay for DIY.
Thimios! 😀, Here are the DIY files..Hope to hear from you the impressions soon!
regards
Prasi
edit: A small "designation typo" on Silk and sch. Please read D8 as D4. As per AKSA's post # 297, it should be 1N4002.
Attachments
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Hello Prasi
greetings very nice layout maybe i will try it out on veroboard
warm regards
Andrew
Hi Andrew,
Thank you!, I have just posted the diy files, you may like to try on home etched PCB.
reg
Prasi
Thanks prasi!Thanks again for the valuable suggestions. C14 and C15 can now also be 470u as 13mm dia x 5mm pitch caps can also be fitted but will extend slightly outside of PCB, I think that's okay for DIY.
Thimios! 😀, Here are the DIY files..Hope to hear from you the impressions soon!
regards
Prasi
edit: A small "designation typo" on Silk and sch. Please read D8 as D4. As per AKSA's post # 297, it should be 1N4002.
Unfortunately shop where transparencies printed will be closed this afternoon,tomorrow too.(Saturday afternoon)🙁
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Hi all.
Red led or zener led in the Vbe?
Hi,
See post #297, it (D7) is a 3.3V 400mW zener diode.
reg
Prasi
Nice design Prasi. I would like to make this as well but there are just so many amps I have in the queue to build already.
I wonder what this will sound like?
I wonder what this will sound like?
Nice design Prasi. I would like to make this as well but there are just so many amps I have in the queue to build already.
I wonder what this will sound like?
Thanks XRK. It is designed by Ranchu32 and AKSA and then later some component value change recommendations by AKSA for improvement. I am damn certain it will sound "musical"





reg
prasi
Maybe something magical mixing a vFET and a BJT - kind of interacial almost 🙂
Yes, I meant layout design. I certainly commend Ranchu and Aksa for such a unique topology. Someone please hurry up and etch the board already and build it! 😀
Enquiring minds want to know how it sounds.
Yes, I meant layout design. I certainly commend Ranchu and Aksa for such a unique topology. Someone please hurry up and etch the board already and build it! 😀
Enquiring minds want to know how it sounds.
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