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Old 21st April 2014, 09:58 PM   #1
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Default A more efficient class A output stage

Ive been playing with a class B assisted class A output stage whereby a lightly biased class A output stage drives class B biased current controlled current sources which provide current assist for the class A stage - which keeps it in class A mode. It can drive ~ 200W RMS into 4 ohms, never leave class A mode, and it only burns ~65 Watts quiescent. Below is the idea. The biasing of the current controlled current sources is accomplished by servoing the class A bias in the class A stage. Biasing tracks really well across temp. I also had to clamp the VAS stage to prevent the output from swinging up too close to the rails as this caused instabilities from a swelling Cbc in the CCCS stage.

The concept is similar to the QUAD405 , but with drastically different implementation. SPICE says its awesome, but I lack THD testing gear. Anyone ever see or try anything like this before? Im trying to decide if I have invented something novel. Any feedback or thoughts are welcome. Here is a link with more detailed info.

Class A Audio Amplifier | Sparkos Labs.comSparkos Labs.com

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Old 22nd April 2014, 07:46 AM   #2
Calvin is offline Calvin  Germany
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Hi,

the sketch suggests that it could be kind of a CFP stage.
With my hybrid JFET-bipolar Calvin-Buffer, the master JFET also never seems to cut off fully.
Still though THD shoots up when approaching class-AB.
But then it was never intended to work in other modes than class-A.
It┤d be interesting to see if and how You managed to keep THD of the output stage low.
User Stee has also shown some interesting schematics he calls current mirror assisted Diamond Buffer (see also #6), Wils-CFP and Wilson-CFP, that also seem very low THD.
And then there┤s the ┤sliding Bias ┤Wilson-CFP class-A` output stage named Allison which might contain certain ideas of how to generate the bias signals for the output transistors.

I couldn┤t tell You if You are into something novel, as the sketch is too basic.
It could as well be that you designed a new variant of a CFP or something else as it could well be that You reinvented a CFP-wheel.

jauu
Calvin

Last edited by Calvin; 22nd April 2014 at 07:53 AM.
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Old 22nd April 2014, 11:51 PM   #3
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Here is a more detailed schematic with biasing. The open collector NPN is the thermal tracking transistor. The diffamp is for bias, it is not an input stage. The 10ma current source in the upper left would be loading a VAS stage. Current limit transistors are shown, but not hooked up. Component values are all pretty close.

Bias is ~.6A for the class A portion, and ~100mA for the "dumping" stage. As the dumpers hand off to one another, the class A stage is in control.

The 2.7K / 500 ohm divider across the thermal tracking transistor sets tracking. The 6.4mA source sets overall bias in the dumping (current controlled current source) portion. This biasing sheme works and tracks well with temp in real life.

The idea was to assist a class A stage with current drive. This would allow the A stage to have a lower bias current (less dissipation) and remain in class A mode even as the output swings 10A.
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