Hi,
+1 on D. Self. Too high bias causes gm doubling and steps
when leaving the class A region, whist also having a near
flat class A x/o region.
I'd call that AB. I'd call optimum AB class aB. There is
no class A region as such, and no gm doubling occurs.
FWIW the latter gives better high levels distortion numbers,
(no gm doubling steps) but worse low level distortion at
levels that do not swing to the where the steps occur
(causing gm doubling) for higher bias AB versus aB.
rgds, sreten.
+1 on D. Self. Too high bias causes gm doubling and steps
when leaving the class A region, whist also having a near
flat class A x/o region.
I'd call that AB. I'd call optimum AB class aB. There is
no class A region as such, and no gm doubling occurs.
FWIW the latter gives better high levels distortion numbers,
(no gm doubling steps) but worse low level distortion at
levels that do not swing to the where the steps occur
(causing gm doubling) for higher bias AB versus aB.
rgds, sreten.
You could also try read this from page 11.
http://www.hpl.hp.com/hpjournal/pdfs/IssuePDFs/1971-02.pdf
http://www.hpl.hp.com/hpjournal/pdfs/IssuePDFs/1971-02.pdf
The reference is to a textbook. This is latest (copyright) edition: Audio Power Amplifier Design: Douglas Self: 9780240526133: Amazon.com: Books
As before, you can download PDFs of older editions like the 4th which is smaller. Google is your friend and link to several sites offering it.
I think you are right. Crossover distortions is the factor and then it is up to you. Bigger current, less Amp utilization. What else?
check out this sites:
Distortion In Power Amplifiers
Audio Amplifier Design
check also the descriptions from page 145 in follow book:
Valve and Transistor Audio Amplifiers - John Linsley Hood - Google Books
I have scanned through the D.Self link given in post11.
It does not seem to include the detail required to set the optimal bias voltage for either the EF, or the CFP output stage.
The EF is easy set to <26mVre when the output devices are cold (300K) and a tiny bit higher when the devices warm up above 300K.
The CFP is more complicated and a lot less voltage. But it depends on the CFP topology. A distortion measuring instrument is required to find the optimal CFP bias voltage.
It does not seem to include the detail required to set the optimal bias voltage for either the EF, or the CFP output stage.
The EF is easy set to <26mVre when the output devices are cold (300K) and a tiny bit higher when the devices warm up above 300K.
The CFP is more complicated and a lot less voltage. But it depends on the CFP topology. A distortion measuring instrument is required to find the optimal CFP bias voltage.
On topic: Playing with all my versions pf my "Reasonable" amplifier project, as I have changed Re and about everything else, I noticed the simulated distortion varies with changes in topology. Where my current two pair outputs with .22 Ohm per device seem to have the lowest distortion (conventional EF, fixed temp of 50 into 8 Ohms) at about 90mA per pair, but the single pair version seems to be lowest at 118 mA. For each device re' + Re are the same, so why the difference? What is effecting the target 26mV? Neither Douglas or Bob are completely clear on this.
Nope.
I don't see how Vre is easy to set. This is not across the external .22 Ohm, but has to include the internal re' component from what I think I understand.
90 mA is about 19mV. .000327% simulated for the two pair version lowest distortion
26mV across the external Re is about 118mA for .000335%
I don't see how Vre is easy to set. This is not across the external .22 Ohm, but has to include the internal re' component from what I think I understand.
90 mA is about 19mV. .000327% simulated for the two pair version lowest distortion
26mV across the external Re is about 118mA for .000335%
a massive number of small or medium BjTs with 10Ω until 50Ω emnitter resistor for operating in parallel mode instead of one pair power devices and one pair emitter resistors is the royal way for a maximum of stability for the bias voltage and resulting idle current is the royal way from my view.
check out post 35 and 36 under this thread:
http://www.diyaudio.com/forums/soli...s-paralleled-place-one-output-transistor.html
and this:
http://www.firstwatt.com/pdf/art_beast.pdf
http://www.diyaudio.com/forums/pass-labs/150048-beast-thousand-jfets.html
http://www.diyaudio.com/forums/pass-labs/228203-article-beast-thousand-jfets.html
from this amp I want to have a schematic:
http://www.diyaudio.com/forums/soli...-amplifier-ia-120-ia120-schematic-wanted.html
check out post 35 and 36 under this thread:
http://www.diyaudio.com/forums/soli...s-paralleled-place-one-output-transistor.html
and this:
http://www.firstwatt.com/pdf/art_beast.pdf
http://www.diyaudio.com/forums/pass-labs/150048-beast-thousand-jfets.html
http://www.diyaudio.com/forums/pass-labs/228203-article-beast-thousand-jfets.html
from this amp I want to have a schematic:
http://www.diyaudio.com/forums/soli...-amplifier-ia-120-ia120-schematic-wanted.html
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