I've found a good test of EMI toughness is to look at THD with a 25mV 100KHz square wave added to the input. High-feedback amps often lose their <10PPM figures this way. How do your amps fare in this test?
The OPS is good. I try to listening music about 1/2 hour and then disconnect the input. After 30 second I measure the bias current. It is still same 😎. But I think 0.22 Ohm emitter resistor is too low. If I set the bias current 26mV->118mA. (For testing I use +-44V) For 3 pair transistors i dissipate about 31W 😱. Big heat sink is expensive. May be I need a fan.
For debugging the IPS, can I use cable to connect IPS and OPS? I think for development I can use veroboard for IPS...
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You don't need that much bias ... sanken H/K is just 35ma across .22R
NJWxxxx is best at 60-70ma/.22Re.
Don't use too long of a cable for IPS-OPS interface , ND- and PD+ feeding
the predrivers is VERY hi-Z !
OS
Low bias can be a problem. At typical bias settings ONSemi outputs usually have no more than 20MHz Ft. Ft rapidly rises with output current, so while the outputs are slow at no output, they speed up significantly at excursions. This can result in dynamic instability and step response aberrations. For this reason I hesitate to set bias very low. Furthermore, slow outputs can detract from resolution, especially in the first-watt class A region.
My experiments show that when you bias a BJT output stage with 11-12mV per emitter resistor, you get a linear class A region for the first watt, and then a step in the transfer curve to class B. This is different from the usual advice (13-26mV?) which results in a very nonlinear class A region which wiggles into the class B region. I theorize the 12mV bias might sound better.
So if you want to lower bias my idea is to try 11-13mV per emitter resistor.
Ideally, you would want the combined voltage across the emitter resistors and the base stoppers to be 11-12mV or so. This would put your bias around 49mA, assuming an Hfe around 100 and base stoppers of 2.2R.
My experiments show that when you bias a BJT output stage with 11-12mV per emitter resistor, you get a linear class A region for the first watt, and then a step in the transfer curve to class B. This is different from the usual advice (13-26mV?) which results in a very nonlinear class A region which wiggles into the class B region. I theorize the 12mV bias might sound better.
So if you want to lower bias my idea is to try 11-13mV per emitter resistor.
Ideally, you would want the combined voltage across the emitter resistors and the base stoppers to be 11-12mV or so. This would put your bias around 49mA, assuming an Hfe around 100 and base stoppers of 2.2R.
Hi uncle OS,
I've made the OPS board & it is different/more slim boards, not stuffed yet...
I will choose the VSSA variant, any changes made to the "VSSA-H" earlier in this thread?
this one you mention is with servo or not?
I'm interested too with NX variant and it is use servo
Regards
Here's an illustration of the bias thing... So, 12.5mV appears to be the sweet spot.
EDIT: Fixed image.
EDIT: Fixed image.
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Amp #1 below ... is similar to the HK680 (a perfect match to the OPS) ,
you would basically have a complete H/K 680R ! It is improved ..with a full CM level
shifter for the positive rail VAS plus , uses the HK's exact compensation.
Good slew at 80+V/us and symmetrical clipping. 800K UG w/90 degree margin.
Amp #2 is one I have been holding back for a while. VSSA input "core" , LED
CCS's with 1 trim-able (no servo for this one) , and simple (Re) decoupled VAS.
Does 90db PSRR , 22ppm-20K and (can) achieve 200V/us + slew.
VSSA "deluxe" - simulates WAY better.
On both amps .... input devices = 1.6 -1.7 ma and VAS is 4.5ma (cool running).
PS- I now am using Keentoken's "standardized" set of directives on all my
IPS simulations .... Very good and accurate. Models ... I use many (swap
alot) ... to see how much "slop" I get on a design. ALL of these IPS's can
tolerate a ridiculous variation of components and still perform. 😀
OS
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Here my progdess so far ... i choose NAD-H IPS
Hope there is no problem when it first turn on
Hope there is no problem when it first turn on
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B. Cordell wrote on his book, the optimum bias is when re' = RE, but output impedance of emitter follower is slightly greater than re'. Then the voltage of RE is lower than 26mV. Is this for emitter follower only? Is 1 pair or more is same?
How to calculate the optimum bias?
If I have distortion meter I just put signal generator then try to set bias current to get lowest distortion 😀
It might be good, (wise)... to use 2 15K resistors from V+/PD+ and V-/ND-
and run the OPS by itself.
This will "fake" a IPS at 4.5ma and let you set the OPS bias.
I even go as far to just solder in 1 pair NJWxxxx to run for the first time.
If you have already put all 3 pair in - disregard.
Use light bulbs to feed the OPS rails and have a quick hand at the mains !! 😀
PS- NAF !! Insulators on output transistors ??? ... make SURE !!
OS
Thank uncle Os,
I have already put insulator on output transistor and check there is no short with heatsink.
Ok, note to use bulb current limiter and quick hand on the main 🙂
Where's to connect FB, do i have to let it alone?
Thanks for your support.
Regards
No FB with a static test of OPS. 15K resistors have no signal , just
filtered rail voltage (cap multiplier OP).
15K should be almost exactly 4.6ma across Vbe with 60V rails. Set bias low (20-35ma/5mV Re on output device).
When you connect a standardized IPS (4.3 -4.7ma VAS) , OPS should
be close to optimum bias - adjust afterwards.
PS - once you get a IPS hooked up .... FB OPS --> FB IPS ...
OS
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I just used OEM recommendations (35ma- Sanken /70ma- ON) . My HK680 is
set to 35ma and the HK990 that I repaired was set to 75ma ....both use .22Re , both work
and sound wonderful. The 990 DOES run hotter , but uses computer controlled
fans to cool the OP devices.
Simulation does show the least PPM THD for 60-100ma using either the cordell
or ON models for NJW/MJLxxxx - any EF2 or 3 circuit.
You are right about the actual OP device .... it adds about .05R to Re.
(this amp actually is about .25-.27Re)
This is the reason for Re , each Op device has a slightly different "semi Re", the
actual resistors "force" balance between individual pairs.
OS
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1: I think the 26mV rule might actually mean across BOTH emitter resistors, IE 13mV+13mV, and over time the distinction was lost to misreading. This would be a more reliable measurement in the case of DC offset causing several mA imbalance between emitter resistors. Guys, we need to get the facts straight before anything else. Arguing is not fun or productive unless you actually have the facts straight.
2: My suggestion was aimed at getting a linear first-watt region - a higher bias may get lower THD in the class B region, but you give up the linear first watt. Also, if you intend BJTs for class A operation, like in an opamp/preamp, this would be ideal.
3: I suggested to go for the first-watt approach because it fit well with the request of a lower bias setting, not because I thought it was ideal in all situations. If an amp is run largely in the class B region (PA/disco system?), a higher bias setting may be appropriate for lower overall distortion. There is room here for personal preferences, of course.
All but 2 of those models all have straight-line Early effect modeling, as far as I can tell - I don't know if there are any model parameters that allow for this. Few models have quasi-saturation modeling, and last time I tried to use the parameters in my own models they either did absolutely nothing or they did weird pointless things that weren't useful. If you have better models, you should post them, or at least share the reason why you won't.
2: My suggestion was aimed at getting a linear first-watt region - a higher bias may get lower THD in the class B region, but you give up the linear first watt. Also, if you intend BJTs for class A operation, like in an opamp/preamp, this would be ideal.
3: I suggested to go for the first-watt approach because it fit well with the request of a lower bias setting, not because I thought it was ideal in all situations. If an amp is run largely in the class B region (PA/disco system?), a higher bias setting may be appropriate for lower overall distortion. There is room here for personal preferences, of course.
All but 2 of those models all have straight-line Early effect modeling, as far as I can tell - I don't know if there are any model parameters that allow for this. Few models have quasi-saturation modeling, and last time I tried to use the parameters in my own models they either did absolutely nothing or they did weird pointless things that weren't useful. If you have better models, you should post them, or at least share the reason why you won't.
this is a build thread, let us not turn this into another blabbering thread....commenting on moderation is a big no-no in these boards,
it would be better if you take your discussions here instead....http://www.diyaudio.com/forums/solid-state/240712-cfa-topology-audio-amplifiers.html
3 points ....
-I do think a discussion of the "sweet spots" for various OP devices is
quite relevant , as we want the least "fatigue" and best overall performance
from our OPS.
-My "OEM" bias comment was not to oversimplify matters , but the big boys
do want thier amps to sound the best ... to sell more !
this thread is for builds AND
to discuss various new IPS's. This will require many opinions and suggestions.
Keentoken's LT skills are already being used in my simulations - VERY valuble.
I admire his commitment to advancments in this arena.
BTW - the Badger and many of my other "advancements" were part "keen" in their
conception - he has helped move the forum's projects into more solid engineering territory. 😎
OS
-I do think a discussion of the "sweet spots" for various OP devices is
quite relevant , as we want the least "fatigue" and best overall performance
from our OPS.
-My "OEM" bias comment was not to oversimplify matters , but the big boys
do want thier amps to sound the best ... to sell more !
this thread is for builds AND
to discuss various new IPS's. This will require many opinions and suggestions.
Keentoken's LT skills are already being used in my simulations - VERY valuble.
I admire his commitment to advancments in this arena.
BTW - the Badger and many of my other "advancements" were part "keen" in their
conception - he has helped move the forum's projects into more solid engineering territory. 😎
OS
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AJT, you must read from the beginning. Keantoken opinion is good for helping me to understand many things here.
The bias current can be set from class B to class A.The trade-off is depend on the designer choice. I want to know how to calculate or to sim optimum bias to get lowest crossover distortion. Self called it optimum bias of class B, Keantoken said "sweet spot" 😀. It is importance when builder do not have distortion meter.
OStripper, is current limiting for protection on output transistor useful or not? Is it affecting the sound?
The bias current can be set from class B to class A.The trade-off is depend on the designer choice. I want to know how to calculate or to sim optimum bias to get lowest crossover distortion. Self called it optimum bias of class B, Keantoken said "sweet spot" 😀. It is importance when builder do not have distortion meter.
OStripper, is current limiting for protection on output transistor useful or not? Is it affecting the sound?
Just run that wire to the IPS NFB. With a (much)smaller IPS VAS heatsink (only 4.5ma here) ,
the board can
be at right angle to the OPS , as well (saves room).
Have you static tested OPS?
DO NOT forget the "G2" to "G2" ground connection on the OPS !
BTW - looking at your build has made for "V1.1" (perfection-below)...
Allows ANY output resistor type.
also shows G2 connections ...
OS
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