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Old 23rd December 2003, 10:03 PM   #1
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Join Date: Aug 2001
Location: Bath, UK
Default Problem controlling a PGA2310

Hi everyone,
Some background.... I've built a 5.1 channel surround amplifier for my PC using three Burr-Brown PGA2310 digitally controlled pots to adjust the volume.. The SPI control signals are produced using a Xilinx CPLD in response to inputs from my up/down volume switches.

It kinda works but one of the PGA2310s almost always produces a nasty DC offset on it's outputs whenever the gain value changes from 128 to 127!! It's always the same device (which controls the center and LFE channels) and the problem goes away as soon as I flick the up switch to return the gain value to 128. The other two PGA2310s have never showed this problem.

The signal timing is shown below. That's a 5ms/div timebase - could the timing be too slow?!

Any thoughts? Could it be a faulty device?

EDIT: I forgot to mention that all three PGAs have their SPI signals paralleled, not daisy chained.

Nice one,
David.
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Old 23rd December 2003, 10:06 PM   #2
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And here's a pic of the amp!
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Old 24th December 2003, 02:37 AM   #3
Mika is offline Mika  Finland
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Hi,

Im working with 5.1 setup also, but with CS3310 and PIC16F877A. I cannot see any problem in that picture, there is enough time between CS --> 0 to first clock pulse and so on. Can you get picture when code is 127? If that seems to be right, controlling is maybe ok. If i remember right, at reset CS3310 output is 1/2 Vcc, so maybe chip is resetting if there is DC at output??

If i look datasheet right, low speeds wont be any problem, lowest clock speed is 0Hz.

- Mika

EDIT: I just remember that ZCEN-function. There is some kind of 18ms timeout circuit if ZCEN is enabled, maybe u should try to disable zero crossing function because controlling is quite slow?? This is just quessing....
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Old 24th December 2003, 02:54 AM   #4
Mika is offline Mika  Finland
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By the way, very nice looking amp. There is poweramps also at saem board? 5 x LM1875?? do u have any display in your system?

My setup is something like this:
PIC16F877A controlling everything, 3xCS3310 pots, HD44780 LCD, HT12A/D for remote controlling and input buffers of course. I build some kind of menu-system, where user can adjust every channel levels and some other things like where sub-channel input comes (from LFE-channel or from MAIN-channels). Software is fully working now, and i have just runned about 50 hours tests with prototype. Now im working with PCB's, exatly they are ready but i have some problems with SMD components delivery.

I have also DIY poweramp, it uses 5xLM3875. Subamp is ESP projects bridged P3A.

- Mika
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Old 24th December 2003, 10:06 AM   #5
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Hello Mika,
Thanks for your input.

I've attached a scope plot showing the offending 127 gain value and, as you can see, it's exactly as expected with HUGE set-up & hold times and everything well within the part's specification.

I'm not sure what you mean by the reset function. The PGA2310 doesn't have a reset pin and I believe it's pin compatible with the CS3310 so you shouldn't have a reset pin either!

The ZCEN function is currently enabled. I'll try disabling it.

I think the chip has to be faulty but I don't really want to request any more free samples from TI. I originally requested three PGA2311 (the +/- 5v version) by mistake and they popped as soon as I put +/-15v onto them. I put in another request for three PGA2310s while cursing myself for not checking the part number. I think a third request is abusing the free samples program!

Does anyone know a source for the PGA2310 in the UK?

Nice one,
David.
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Old 24th December 2003, 10:09 AM   #6
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To answer you other questions, the power amps are all onboard and consist of five TDA2050s for front/center/rear and two LM3668s to drive a dual VC sub. The sub channel also has a 20Hz low pass filter and a Linkwitz Transform to boost the bass.

The pic below shows a bit more. You can just about see the seven power amps and a pair of 2N3055/2N2955 to reduce the +/-32v subamp supplies to +/-24v for the TDA2050s. Physically it's like a plate amplifier which is bolted to the rear of the sub. The two aluminium bars connect onto a "bloody big" heatsink on the back.

The whole project sounds really good, as long as I don't reduce the volume too much! The bass is fantastic considering it's only an 8 driver in 25 liters sealed. The sub only bottoms out if I play it really loud.

The only display I have in my system is an LED!

It sounds like you have quite a project there. How long has it taken so far? What complier are you using for the PIC? I'd like to learn how to use PICs as CPLDs are very limiting for control applications.
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Old 24th December 2003, 10:46 AM   #7
Mika is offline Mika  Finland
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Hi!

I have used assembler language to program PIC, its maybe the hardest way but i think that way source code is fully free from bugs and i know exatly what every instruction do. I started my project about 4 months ago, but school has take almost all my time last 2 months.

I hope that my preamp is ready in next 2 months. I attached one picture of my prototype (NOT-SO-NICE-version) . There is only 2 channels on that board. I will report more to here forum, when i got preamp finished.

And yes, maybe that one PGA is broken. And yes, i remember wrong there is no any external reset, only thing to do was keep MUTE-pin active more than 100us on a start up (if i can remember even that right

Have u made that PCB yourself?
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Old 27th December 2003, 02:54 PM   #8
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Default Case solved.

I've done a little more investigation over the Christmas break....

When the gain is set to 128 (-32dB), the DC offset on all three PGA2310s is less than 1mV. When the gain is reduced from 128 to 127, all three chips show a jump in offset but the 'good' chips only are one or two milivolts whereas the 'bad' chip is almost 12mV, on both channels. I'm guessing the internal gain setting resistors are poorly matched in this particular part.

The power amps are all DC coupled to the PGA2310. The amps have a gain of x30 so the offset gets amplified and the Linkwitz Transform for the sub has an additional DC gain of x4 so that 12mV offset becomes 1.4v at the driver!

The bad PGA2310 does not meet spec (data sheet says 3mV offset max with the input grounded and gain set to 0dB) but it seems to work okay otherwise so I guess I'm going to have to squeeze some DC block capacitors in there somewhere....

To answer your question, I designed the PCB using the Proteus suite from Labcenter (very good software - recommenced). I laser printed the design onto Press 'n Peel then etched in ferric chloride. The PCB is doubled sided and it's quite awkward to align the top and bottom layers but it allows much better routing, especially considering I've got three ground planes (digital, analogue signal and analogue power).

Your project looks very ambitious! Good luck.

And remember to fit those DC blocking capacitors!
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