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Catch diodes fitted to the output and VAS current increased to ~10mA.
Should Q3 have small heat sink? The dissipation is around ~350mW.
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Yes, it will need one. Heating of the VAS will affect the dc-offset and it might be worth doing some Spice modelling to see if the dc-offset transistor should be mounted in contact with the VAS or not.
What are the catch diodes for ? Limiting output voltage ?
The catch diodes return back EMF generated by the speakers to the rails rather than reverse biasing the output transistors, which could cause damage.
You don't see these output protections on Rod Elliott's designs, but are pretty commonplace, along with a zobel and output coil.
Should Q3 have small heat sink? The dissipation is around ~350mW.
Bimo, the next PCB revision will place the VAS in a better position to attach a sizeable heatsink made from aluminium flashing. With 10mA it will get pretty warm on 35V rails and with 42V it will get quite hot indeed.
Bigun, what are your thoughts on substituting a KSA992 for the input transistor? Would the extra gain be beneficial? Would I need to recalculate the compensation?
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I used Spice to work out the basic compensation values and then tweak by ear. I would expect that you won't need to change the compensation for this input device - it should not be that sensitive.
I tried to build this in Ltspice but realized I don't have any models for the MOSFETs. Is there a place to get those?
I tried to build this in Ltspice but realized I don't have any models for the MOSFETs. Is there a place to get those?
Try these:
.MODEL 2SK1058_D NMOS (VTO=403.969M KP=20U L=2U W=29.7482M GAMMA=0 PHI=600M LAMBDA=184.988F RD=60.8251M CBD=2.56138N IS=10F CGSO=1.13517N CGDO=1.13517N TOX=0 NSUB=0 TPG=1 UO=600 RG=50 RDS=1MEG )
.MODEL 2SJ162_D PMOS (VTO=842.193M KP=20U L=2U W=21.3317M GAMMA=0 PHI=600M LAMBDA=20.7067M RD=837.199M CBD=2.96862N IS=10F CGSO=1.13517N CGDO=1.13517N TOX=0 NSUB=0 TPG=1 UO=600 RG=50 RDS=1MEG )
Try these:
.MODEL 2SK1058_D NMOS (VTO=403.969M KP=20U L=2U W=29.7482M GAMMA=0 PHI=600M LAMBDA=184.988F RD=60.8251M CBD=2.56138N IS=10F CGSO=1.13517N CGDO=1.13517N TOX=0 NSUB=0 TPG=1 UO=600 RG=50 RDS=1MEG )
.MODEL 2SJ162_D PMOS (VTO=842.193M KP=20U L=2U W=21.3317M GAMMA=0 PHI=600M LAMBDA=20.7067M RD=837.199M CBD=2.96862N IS=10F CGSO=1.13517N CGDO=1.13517N TOX=0 NSUB=0 TPG=1 UO=600 RG=50 RDS=1MEG )
Thanks bimo,
I am having trouble getting the pots to work. Maybe one of you can help me with that.
Attachments
Thanks bimo,
I am having trouble getting the pots to work. Maybe one of you can help me with that.
Include this spice directive ".INCLUDE potentiometer_standard.lib"
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The models I've seen just have a simple resistor with the value set to whatever resistance is required. Not sure why you'd need or want a variable resistor in a Spice model.
Include this spice directive ".INCLUDE potentiometer_standard.lib"
That did it. Thanks
The file works but has pretty low output and clips funny. Maybe you guys can play with it.
Attachments
The models I've seen just have a simple resistor with the value set to whatever resistance is required. Not sure why you'd need or want a variable resistor in a Spice model.
Because it's there in your schematic?
That did it. Thanks
The file works but has pretty low output and clips funny. Maybe you guys can play with it.
Try this.
ULGF is high but did not any sign of oscillation.
Loop gain is flat from few hertz until around 200kHz 😱
Attachments
Terry, thanks for putting the time into this. I'm not familiar with Spice and your contribution is invaluable.
My schematic doesn't have any source resistors on the outputs as you've already noticed. One way to set the bias is to temporarily install some 10R /5W resistors on the power rails and measure the Vdrop across those.
- Set the rails to +/- 35 to 45V
- In your Spice model set R13 and VR1 to 0R
- Measure and take note of the Vdrop across one of the 10R power resistors
- increase VR1 until the Vdrop increases by 1V.
- this 1Vdrop should equate to ~100mA bias
My schematic doesn't have any source resistors on the outputs as you've already noticed. One way to set the bias is to temporarily install some 10R /5W resistors on the power rails and measure the Vdrop across those.
- Set the rails to +/- 35 to 45V
- In your Spice model set R13 and VR1 to 0R
- Measure and take note of the Vdrop across one of the 10R power resistors
- increase VR1 until the Vdrop increases by 1V.
- this 1Vdrop should equate to ~100mA bias
Hi Christian,
As you can see, I have a long way to go using Ltspice. The more I use it, the more I learn. I almost always have to get help from someone to get it working properly. It has been very valuable to me for trouble shooting. If you have a working model in spice, you can take measurements at different points in the model and compare it to your non-functioning board and often find the issue. At least it gives you a baseline to work from. A very nice, free tool. I highly recommend you DL it and start practicing.
Blessings, Terry
As you can see, I have a long way to go using Ltspice. The more I use it, the more I learn. I almost always have to get help from someone to get it working properly. It has been very valuable to me for trouble shooting. If you have a working model in spice, you can take measurements at different points in the model and compare it to your non-functioning board and often find the issue. At least it gives you a baseline to work from. A very nice, free tool. I highly recommend you DL it and start practicing.
Blessings, Terry
Terry, it high up on my "to do" list. Unfortunately it is a fairly steep learning curve and I haven't had the time to focus on it lately.
I'm hoping that Bimo, yourself and other knowlegeable lurkers watching this thread, who are familiar with this tool may be able to assist this time around.
I'm hoping that Bimo, yourself and other knowlegeable lurkers watching this thread, who are familiar with this tool may be able to assist this time around.
Hi Christian,
My pleasure to do the part I know. Another nice thing about spice is that it won't let you name an NPN with a PNP name. On your schematic, Q3 is a P channel transistor but you have it labeled KSC3503. That is an n-channel transistor. When I went looking for it in spice it only showed me the p-channel devices. They are KSA. Fun stuff!
My pleasure to do the part I know. Another nice thing about spice is that it won't let you name an NPN with a PNP name. On your schematic, Q3 is a P channel transistor but you have it labeled KSC3503. That is an n-channel transistor. When I went looking for it in spice it only showed me the p-channel devices. They are KSA. Fun stuff!
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