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Old 11th November 2013, 11:28 PM   #151
danny92 is offline danny92  Portugal
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Join Date: Nov 2012
Location: Lisbon
Hi rsavas and thank you for your great help,

Do you think that I should do both channels (the amplifier is stereo) in the same PCB or I should make two PCBs?
The preamplifier and other tone controls must stay in this main PCB(s) or in another one, what about the power supply bridge rectifier and capacitors?
I will use this relays, how I can simulate the optocoupler before adding them to the PCB, I wanted to simulate this relay with the optocoupler, how I can simulate this circuits in LTSpice?
ESP - MOSFET Solid State Relays

Best regards,
Daniel
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Old 12th November 2013, 04:21 AM   #152
rsavas is offline rsavas  Canada
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Join Date: Aug 2012
Location: Ontario
Quote:
Do you think that I should do both channels (the amplifier is stereo) in the same PCB or I should make two PCBs?
Up to you/ I guess that it depends on the size.
Quote:
I will use this relays, how I can simulate the optocoupler before adding them to the PCB, I wanted to simulate this relay with the optocoupler, how I can simulate this circuits in LTSpice?
That I do not know.
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Old 13th November 2013, 03:07 AM   #153
danny92 is offline danny92  Portugal
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Join Date: Nov 2012
Location: Lisbon
Unhappy Need help!!!

Hi everyone,

I can't begin the PCB design right now because I still have some problems and doubts,

The main problem is that it seems that I've instabilities in internal nodes, I've added a few pictures about the strange responses of those nodes, even at the output there's a peaking starting at about 200 MHz.
The other problems are related to the current sources that are varying too much with temperature and the fact that I don't have thermal compensation for the drivers.
I don't know how to simulate an NTC thermistor in LTSpice and I want to simulate the thermal shutdown circuit, now that I've the output solid state relay, I also want to add a poping prevention delay network to connect also to the output relay, how I can connect all those things to the output relay with an OR logic gate?
The solid state relay I'm using is based on Rod Elliot's designs ESP - MOSFET Solid State Relays
Do you have some ideas about the startup delay circuit?
I really need your help, I can't move on with this project and make the PCB without achieving stability in the simulations.
I also need help with the stability problems, it's very important it's making me mad, because the amp has good gain/ phase margins but seems to have strange behaviours in the internal nodes. Why?
Please someone help me here!!


Thank you very much for your attention,
Best regards,
Daniel
Attached Images
File Type: jpg Amp7_btmc_hb5_s_bd12_prot_solid_state_output_relay.jpg (193.7 KB, 61 views)
File Type: jpg amp7_12_vb1_instability.jpg (293.1 KB, 58 views)
File Type: jpg amp7_12_vb2_instability.jpg (296.5 KB, 53 views)
File Type: jpg amp7_12_vb2-vb1_instability.jpg (300.6 KB, 50 views)
File Type: jpg amp7_12_vb3_instability.jpg (299.6 KB, 50 views)
File Type: jpg amp7_12_vout_instability.jpg (298.2 KB, 20 views)
Attached Files
File Type: asc Amp7_btmc_hb5_s_bd12_prot_solid_state_output_relay.asc (30.5 KB, 8 views)
File Type: txt Cordell Models.txt (19.2 KB, 3 views)
File Type: txt BC3x7_40 Models.txt (1.2 KB, 3 views)
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