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Old 31st October 2013, 12:52 AM   #101
mcd99uk is offline mcd99uk  United Kingdom
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Bear,

Can't see a problem with a near DC signal with a 20k sine imposed on top. I'll run a sim tomorrow evening (It will take some time). But I have tried it in testing for stability in real life. I had a fair offset of around 5V DC at the amp output with a sine running just up to clipping with no problems.

You may hear a difference with films vs electrolytics but it may not be as significant as you think as transistors can reject distortion at their collectors. Paralleling films and electrolytics are not a good idea. You have the potential for resonance / oscillations with this arrangement.

Active bootstrap sounds interesting. Have you any ideas?

Danny,

Not sure which self circuit you are talking about. I only have 5th edition of his book.

I would go for the cascode (or at least lay the PCB out for one, you don't have to populate it). I'm going for as cascode in the next amp. It's all about learning and overcoming the problems.

The working amp is using Edmond's DTMC (Variant of normal TMC). It has Lead lag on the VAS output and an enhanced beta VAS. I borrowed a couple of ideas from Edmond's designs. No idea of real world THD as I don't yet have the equipment or access to any.

Real world testing allowed me to get the amp stable without gate zobels or caps but there was a very low level oscillation (around 20Mhz) that was causing an extra 20mA to be drawn off the PSU. This was fixed with G-D caps.

You'll find my monster circuit that is my first attempt at solid state design here

Amp design attempt number 2 (simpler)

It's overly complex but has served its purpose in getting some basic principles right.

Paul

PS Scopeboy, it was my failed attempt at making a blameless that got me designing my own amp The failed blameless would oscillate as soon as the output was connected to anything. No amount of miller comp made it work. So I stripped the components back out and threw the PCB away. It's much more fun creating your own stuff even if its not as good

Last edited by mcd99uk; 31st October 2013 at 12:55 AM.
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Old 31st October 2013, 02:45 AM   #102
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Paul,

I actually haven't done any thinking, assuming I could do some, about an active bootstrap.

My first inclination is to consider something that would revolve around a current mirror that gets driven. Second thought is something that might be a variant on the Allison bias scheme. But quite frankly, in terms of design, I am spotty, my main advantage if I have one is being born long enough ago to have seen and read a lot of stuff over time, where some things flash vaguely in the back synapses of what passes for a brain. So, nothing specific that I can point to. In fact I kind of think that the idea of bootstrapped drivers is one that hasn't been fully explored - thus the proliferation of designs that required a separate and higher voltage supply for the driver stage in order to get the outputs fully driven.

I suppose in some cases the paralleled caps could be a problem, but I haven't run into that myself. Electrolytics just make for icky sound, especially in places like feedback loops, and the like. The better (audio) electrolytics exist because they do sound better.

I'd not count on feedback to "fix" too many ills.

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Old 31st October 2013, 06:54 AM   #103
danny92 is offline danny92  Portugal
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Hi everyone,
I appreciate your help,

This night was dedicated to VI limiter circuits, I will try to the other improvements tomorrow night, I've made the changes you suggested, mcd99uk, but it seems like the drivers are getting out of their SOA, the IC current is getting close to 700mA, and Pd is 600-700mW, so I've made two test circuits, one with the output VI limiter connected to the drivers output and with a local VI limiter to limit the Ic and Pd of the drivers, even with this mods Pd of the drivers is high (450-500mW), the Id current was succesfully reduced to 100-150 mA, I've also changed the Vgs max of the output transistors (max Vgs is now 10V), what are the vgs max values you're using in your Exicon lateral mosfets, mcd99uk? I think they are similar to BUZs. As I said this solution is acceptable, but it adds complicity to the circuit and it is not very stable while limiting, because it is dependent of two VI limiters (drivers and OPS), PM and GM remains unchanged, no peakings and the THD values are preserved
The other circuit that is more simple, uses only one VI limiter at the output connected to the VAS, but to prevent oscillations I've to use base-collector capacitors instead of base-emitter capacitors, that's not a very good solution, but it was the only way to tame the oscillations, without compromising the drivers safety, this circuit decreases phase margin to less 1º, but the amp remains stable and without any peakings.

If you have time, please, take a look at my modifications.

I like your amp, mcd99uk.
It's a CFA design, right?
It has bootstrapped diamond buffer, really interesting.
Why do you prefer the CFA designs?

PS:
I've reduced Rs resistors to 0R15, to have more DF.
I will take a look at Douglas Self's Blameless amp as you suggested, scopeboy

Best regards,
Daniel
Attached Images
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File Type: jpg amp7_tmc_hb5_bd10_prot3_3.jpg (224.6 KB, 195 views)
Attached Files
File Type: asc Amp7_tmc_hb5_s_bd10_prot2.asc (28.3 KB, 4 views)
File Type: asc Amp7_tmc_hb5_s_bd10_prot3.asc (26.8 KB, 3 views)
File Type: txt Cordell Models.txt (19.2 KB, 2 views)
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Old 31st October 2013, 08:39 AM   #104
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Essentially the Blameless is just the classic voltage feedback amp circuit with the following changes:

Emitter degeneration on the input stage.
Current mirror load for the input stage.
Beta enhanced VAS.
Monster electrolytic cap in the feedback network (Self proved the "icky sound" is mitigated by using a cap so big that hardly any audio voltage appears across it)
Full complementary output stage, either double EF or CFP.

It isn't rocket science and really shouldn't be too hard to get working. The circuit you're simulating qualifies as a Blameless already.

You can see my "Selfless Amp" at scopeboy.com/amps - it includes a fully worked out and tested dual-slope VI limiter. The only change I made to the design since publishing the schematics was to put a diode in parallel with Cdom to improve the clipping behaviour.

On the subject of oscillations, I've found that the output stage will sometimes oscillate all by itself. The stopper resistors between the VAS and the driver transistors are critical in keeping it quiet. I've always found the values by experiment. I start at 100 ohms and increase them until I don't see any parasitics when driving a reactive load. Then I increase them some more for luck
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Last edited by scopeboy; 31st October 2013 at 08:45 AM.
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Old 31st October 2013, 05:13 PM   #105
mcd99uk is offline mcd99uk  United Kingdom
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Quote:
Originally Posted by scopeboy View Post
On the subject of oscillations, I've found that the output stage will sometimes oscillate all by itself. The stopper resistors between the VAS and the driver transistors are critical in keeping it quiet. I've always found the values by experiment. I start at 100 ohms and increase them until I don't see any parasitics when driving a reactive load. Then I increase them some more for luck
This is probably where I went wrong. But as a good side effect it got me into amplifier design. Prior to this I was building other peoples designs.
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Old 31st October 2013, 11:47 PM   #106
mcd99uk is offline mcd99uk  United Kingdom
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Quote:
Originally Posted by danny92 View Post
I like your amp, mcd99uk.
It's a CFA design, right?
It has bootstrapped diamond buffer, really interesting.
Why do you prefer the CFA designs?
Hi Danny,

Yes, my amp is a CFA. My second design is a CFB also. It's not that I prefer CFA designs from a performance point of view. I like the topology as it takes care of slew rate automatically and they are easier to compensate.

The diamond output stage is ok but I'm not sure it brings much extra to the table over a normal output stage. It does produce strange phase effects. Discovered this when I tried to attach it to magic Box's VAS. Impossible to compensate without adding excess THD.

Your issues with the drivers going outside there SOA is because you have very big bootstrap caps. It may be worth calculating what you really need. Yours are almost twice the size of the ones I have used and the ones I used are probably over kill already. Worth some thought.

Your second version of the current limiting circuit adds excess complexity for what it gains.

Have you looked at the folded drivers detailed in Cordell Page 239 Fig 11.6. This topology performs well in sims. You can still use small driver transistors. May be easier to implement current limiting too.
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Old 1st November 2013, 06:10 AM   #107
danny92 is offline danny92  Portugal
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Hi everyone,
Thank you very much for your help mcd99uk and scopeboy,

This night was dedicated to the test of the VI limiters and folded drivers.
As about the folded drivers I've discovered that they seem to add lots of THD20
and when I use them it's also difficult to set up the quiescent current in the output devices, I've to use a very low 10ohm resistor at the VAS!! I think they are intended to use with vertical MOSFETs not with laterals, I also have assimetrical current limiting when using the single slope VI limiter, almost no current enters the N transistor of the VI limiter and I can't understand why, if you want you can check my circuit to see if I done something wrong.
Talking about VI limiters, I've found out that in my design I really need something to protect the drivers even if I use 100u bootstrap capacitors, so I only see two options or I use a circuit to protect the drivers that it's working but with some oscillations, or I've to use a VI limiter connected to the VAS, but I'll have to use base to collector capacitors, and that's not good for PM, can you help me here?
Do you had the same problem in your amplifier mcd99uk?
In my previous drivers design where I've a pair of MJEs the current limiting can be sucessfully made using a VI limiter similar to the one you used in your circuit also with base to emitter caps, but connected to the VAS.

PS:
I've also tested a very, very simple CFA amp, but it's really bad, I've taken some ideas from one circuit I've seen from Analog Devices, it's a common CFA, but the performance is really bad, with very high THD, and a very bad output excursion, I don't know how to adjust the quiescent current in the output devices, the phase margin seems good, but the compensation is strange, I also want to make a CFA design later, my priority is making this VFA amplifier, but I also want to design a CFA to build later, but I don't know much about CFA, there are any books or papers that I can look at to take some inspiration. I don't want to just copy one design. Can you help me? Please.

Best regards,
Daniel
Attached Images
File Type: jpg amp7_tmc_hb5_bd10_prot2_3.jpg (235.5 KB, 166 views)
File Type: jpg CFA_test.jpg (195.0 KB, 157 views)
File Type: jpg amp7_tmc_hb5_drivers_prot.jpg (216.4 KB, 156 views)
File Type: jpg amp7_tmc_hb5_fd_prot_.jpg (247.4 KB, 33 views)
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File Type: asc Amp7_tmc_hb5_s_bd10_prot2.asc (28.3 KB, 5 views)
File Type: asc Amp7_tmc_hb5_s_fd.asc (28.2 KB, 2 views)
File Type: asc CFA_test.asc (24.7 KB, 1 views)
File Type: txt Cordell Models.txt (19.2 KB, 2 views)
File Type: asc Amp7_tmc_hb5_s_drivers_prot.asc (25.7 KB, 2 views)

Last edited by danny92; 1st November 2013 at 06:14 AM.
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Old 1st November 2013, 08:06 AM   #108
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Sorry if I'm missing something obvious, but what is the point of the bootstrapped drivers? They won't drive the MOSFET gates outside the supply rails. Emitter followers have a gain of 1, so the voltage swing is still limited by the VAS.
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Old 1st November 2013, 12:33 PM   #109
Pingrs is offline Pingrs  United Kingdom
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Quote:
Originally Posted by scopeboy View Post
....fully worked out and tested dual-slope VI limiter.
Scopeboy,

Have you any plots of the VI locus against SOA curve, and calculations you used, to derive your two-slope component values?

Brian.
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Old 1st November 2013, 12:49 PM   #110
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Plots here: scopeblog Blameless short circuit protection These were derived from pulse testing into an 0.1 ohm load while adjusting the rail voltage. The finished amp uses two pairs of output transistors, so the current axis is doubled.

I started with the component values published in Self's book and tweaked by simulation in LTSpice.
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