Also looks V.Good. Will pcb become available so it can be built and measured against the SIM version?
Thx-RNMarsh
Thanks Richard, do you find that this amp is a bit to complicated?
I will design the PCB and we'll see how to proceed.
BR Damir
This is my last modification of the CFA amp...
Hi Damir
Nice work, as usual.
What is the noise?
The 2nd plot looks just a little odd. The 2nd cursor says about 180 but this does not match the scale on the left, does it?
Best wishes
David
Hi Damir
Nice work, as usual.
What is the noise?
The 2nd plot looks just a little odd. The 2nd cursor says about 180 but this does not match the scale on the left, does it?
Best wishes
David
Hi David,
You meant on the right, I suppose. Maybe this one shows it better.
BR Damir
By the way here is the schematic of the same amp with enhaced CM suggested by Manso.
I hope I did it correctly, Manso?
Attachments
Last edited:
...Maybe this one shows it better.
My mistake, that is clearer, thank you.
Still curious about the noise, of course.
Best wishes
David
Last edited:
This is my last modification of the CFA amp. The gain stage is a current conveyour, output stage is my implementation of the HEC OPS.
The phase margin is 86 degree, gain margin is 11dB
THD1k is 2.6ppm, THD20k is 5.6ppm, THD40k is 25ppm all at 50W on 8ohm load
The loop gain(LG) could be changed by changing R36 value.
Interesting that distortion is going somewath down with lower LG.
BR Damir
P.S. Manso, using your CM enhancement distortion is going down but slightly
Good numbers overall but THD alone is not always indivative
of systematic good linearity in all fronts , tests at the same
power using a 19+20KHz 1/1 sine waves as well as the usual
400 + 7KHz 4/1 would be of interest.
Also , distorsion at 10KHz is more adequate than THD20K
wich do not produce audible THD since the first harmonic
is at 40KHz , heck , even 10KHz harmonics are not audibles.
My mistake, that is clearer, thank you.
Still curious about the noise, of course.
Best wishes
David
Probably not good enough for sensitive speakers.
BR Damir
Attachments
as well as the usual 400 + 7KHz 4/1 would be of interest.
Wahab,
Please could you explain what this test highlights?
Thank you
Paul
Good numbers overall but THD alone is not always indivative
of systematic good linearity in all fronts , tests at the same
power using a 19+20KHz 1/1 sine waves as well as the usual
400 + 7KHz 4/1 would be of interest.
Also , distorsion at 10KHz is more adequate than THD20K
wich do not produce audible THD since the first harmonic
is at 40KHz , heck , even 10KHz harmonics are not audibles.
I will simulate 19+20k and 400+7k later and THD8k(jung ears can hear 16kHz) is 2.88ppm.
Looking at the whole landscape, it seems that the input stage is (and has to be ) the dominant pole in a well designed CFA, with modern fast devices. And who want to reduce the speed of the loop itself, loosing all the benefits of such a topology ?The mirror response is flatter and wider than a straight common emitter stage
The impedance of the feedback resistance, charged by the parasitic capacitance of the emitter, is the best and simplest way to set the overall bandwidth for a flat curve.
But this capacitance is non linear: increasing the feedback impedance source reduce the bandwidth to the point there is no more peak in the response curve, but, in the same time, increase distortion.
As i don't see how this distortion can be canceled, i doubt any complicated assembly for this input stage, apart Constant Current Source, will bring a huge benefit.
The Dadod's work can be seen as a good demonstration of this: as it is said to measure ~0.002% with an awfully limited bandwidth and slew-rate, while VSSA, as an example, measure some 0.001 %. at 50W too with a bandwidth flat to several MHz and average slew-rate for a CFA, due to the miller cap.
This miller cap was a way to reduce feedback impedance and HD while it reduce slew-rate, keeping stability, kind of a compromise.
The main mistake in Dadod's schematic was to use the collector of the input stage with high parasitic capacitance to enter the feedback.
The designer experienced to VFA has to change his mind and look for slew rates instead of impressive HD numbers because it is what we are fighting for. Anything < 0.01% at 1Khz is OK and will not be noticed in listening experience witch is all about. Sims are just cartoons and impressive THD numbers marketing arguments.
Last edited:
Probably not good enough for sensitive speakers.
4 nV/rt Hz is very quiet. Don't be so modest! Should be fine for all but exceptional cases.
Best wishes
David
And i believe the only way do decide where is the best compromise is by carefull listening comparisons *on the test bench*.This miller cap was a way to reduce feedback impedance and HD while it reduce slew-rate, keeping stability, kind of a compromise.
Brad, I'll have to add that to the multi sim I posted earlier - it certainly looks promising. Nice to see you tool up the 5mA challenge! 🙂
This is my last modification of the CFA amp. The gain stage is a current conveyour, output stage is my implementation of the HEC OPS.
The phase margin is 86 degree, gain margin is 11dB
THD1k is 2.6ppm, THD20k is 5.6ppm, THD40k is 25ppm all at 50W on 8ohm load
The loop gain(LG) could be changed by changing R36 value.
Interesting that distortion is going somewath down with lower LG.
BR Damir
P.S. Manso, using your CM enhancement distortion is going down but slightly
Good loop response - only a few dB down at 20 kHz. But, try to simplify a bit eg 4 transistors for front end current sources? A zener and a resistor give same performance. Simpler is better.
Originally Posted by wahab
"Good numbers overall but THD alone is not always indivative
of systematic good linearity in all fronts , tests at the same
power using a 19+20KHz 1/1 sine waves as well as the usual
400 + 7KHz 4/1 would be of interest.
Also , distorsion at 10KHz is more adequate than THD20K
wich do not produce audible THD since the first harmonic
is at 40KHz , heck , even 10KHz harmonics are not audibles."
Wahab, a few posts ago you were complaining about crappy CFA and how bad they were compared to VFA, now I see a change of position. What happened?
😉
"Good numbers overall but THD alone is not always indivative
of systematic good linearity in all fronts , tests at the same
power using a 19+20KHz 1/1 sine waves as well as the usual
400 + 7KHz 4/1 would be of interest.
Also , distorsion at 10KHz is more adequate than THD20K
wich do not produce audible THD since the first harmonic
is at 40KHz , heck , even 10KHz harmonics are not audibles."
Wahab, a few posts ago you were complaining about crappy CFA and how bad they were compared to VFA, now I see a change of position. What happened?
😉
Looking at the whole landscape, it seems that the input stage is (and has to be ) the dominant pole in a well designed CFA, with modern fast devices. And who want to reduce the speed of the loop itself, loosing all the benefits of such a topology ?
The impedance of the feedback resistance, charged by the parasitic capacitance of the emitter, is the best and simplest way to set the overall bandwidth for a flat curve.
But this capacitance is non linear: increasing the feedback impedance source reduce the bandwidth to the point there is no more peak in the response curve, but, in the same time, increase distortion.
As i don't see how this distortion can be canceled, i doubt any complicated assembly for this input stage, apart Constant Current Source, will bring a huge benefit.
The Dadod's work can be seen as a good demonstration of this: as it is said to measure ~0.002% with an awfully limited bandwidth and slew-rate, while VSSA, as an example, measure some 0.001 %. at 50W too with a bandwidth flat to several MHz and average slew-rate for a CFA, due to the miller cap.
This miller cap was a way to reduce feedback impedance and HD while it reduce slew-rate, keeping stability, kind of a compromise.
The main mistake in Dadod's schematic was to use the collector of the input stage with high parasitic capacitance to enter the feedback.
The designer experienced to VFA has to change his mind and look for slew rates instead of impressive HD numbers because it is what we are fighting for. Anything < 0.01% at 1Khz is OK and will not be noticed in listening experience witch is all about. Sims are just cartoons and impressive THD numbers marketing arguments.
If you did not recognize before was loop gain and here is amp gain.
Attachments
Very good dadod. This is what CFA is about: very wide loop bandwidths and high slew rates. Also, you are achieving low distortion. Very nice! 🙂
Originally Posted by wahab
"Good numbers overall but THD alone is not always indivative
of systematic good linearity in all fronts , tests at the same
power using a 19+20KHz 1/1 sine waves as well as the usual
400 + 7KHz 4/1 would be of interest.
Also , distorsion at 10KHz is more adequate than THD20K
wich do not produce audible THD since the first harmonic
is at 40KHz , heck , even 10KHz harmonics are not audibles."
Distorsion at 10 or 20 kHz is significative as it is a good indicator of Slew Induced Distorsion which it shows up much sooner than Transient Intermodulation Distorsion.
If your curve was open loop, it is VERY good, indeed, my mistake.If you did not recognize before was loop gain and here is amp gain.
What's the slew rate and little signal square waves ?
Looking at your closed loop, you can surely achieve ~4MHz, closed.
Last edited:
If your curve was open loop, it is VERY good, indeed, my mistake.
What's the slew rate and little signal square waves ?
Looking at your closed loop, you can surely achieve ~4MHz, closed.
It was not open loop gain but loop gain or feedback level.
I have to simulate slew rate yet, this will follow.
P.S. nobody is commenting on very low feed back here!
It was not open loop gain but loop gain or feedback level.
I have to simulate slew rate yet, this will follow.
P.S. nobody is commenting on very low feed back here!
Yes, feedback is low and your distortion is low!
- Home
- Amplifiers
- Solid State
- CFA Topology Audio Amplifiers