CFA Topology Audio Amplifiers

Hi Damir
Nice work, as usual.
What is the noise?
The 2nd plot looks just a little odd. The 2nd cursor says about 180 but this does not match the scale on the left, does it?

Best wishes
David

Hi David,
You meant on the right, I suppose. Maybe this one shows it better.
BR Damir

By the way here is the schematic of the same amp with enhaced CM suggested by Manso.
I hope I did it correctly, Manso?
 

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This is my last modification of the CFA amp. The gain stage is a current conveyour, output stage is my implementation of the HEC OPS.

The phase margin is 86 degree, gain margin is 11dB

THD1k is 2.6ppm, THD20k is 5.6ppm, THD40k is 25ppm all at 50W on 8ohm load

The loop gain(LG) could be changed by changing R36 value.
Interesting that distortion is going somewath down with lower LG.
BR Damir

P.S. Manso, using your CM enhancement distortion is going down but slightly

Good numbers overall but THD alone is not always indivative
of systematic good linearity in all fronts , tests at the same
power using a 19+20KHz 1/1 sine waves as well as the usual
400 + 7KHz 4/1 would be of interest.

Also , distorsion at 10KHz is more adequate than THD20K
wich do not produce audible THD since the first harmonic
is at 40KHz , heck , even 10KHz harmonics are not audibles.
 
Good numbers overall but THD alone is not always indivative
of systematic good linearity in all fronts , tests at the same
power using a 19+20KHz 1/1 sine waves as well as the usual
400 + 7KHz 4/1 would be of interest.

Also , distorsion at 10KHz is more adequate than THD20K
wich do not produce audible THD since the first harmonic
is at 40KHz , heck , even 10KHz harmonics are not audibles.

I will simulate 19+20k and 400+7k later and THD8k(jung ears can hear 16kHz) is 2.88ppm.
 
The mirror response is flatter and wider than a straight common emitter stage
Looking at the whole landscape, it seems that the input stage is (and has to be ) the dominant pole in a well designed CFA, with modern fast devices. And who want to reduce the speed of the loop itself, loosing all the benefits of such a topology ?
The impedance of the feedback resistance, charged by the parasitic capacitance of the emitter, is the best and simplest way to set the overall bandwidth for a flat curve.
But this capacitance is non linear: increasing the feedback impedance source reduce the bandwidth to the point there is no more peak in the response curve, but, in the same time, increase distortion.
As i don't see how this distortion can be canceled, i doubt any complicated assembly for this input stage, apart Constant Current Source, will bring a huge benefit.
The Dadod's work can be seen as a good demonstration of this: as it is said to measure ~0.002% with an awfully limited bandwidth and slew-rate, while VSSA, as an example, measure some 0.001 %. at 50W too with a bandwidth flat to several MHz and average slew-rate for a CFA, due to the miller cap.
This miller cap was a way to reduce feedback impedance and HD while it reduce slew-rate, keeping stability, kind of a compromise.
The main mistake in Dadod's schematic was to use the collector of the input stage with high parasitic capacitance to enter the feedback.

The designer experienced to VFA has to change his mind and look for slew rates instead of impressive HD numbers because it is what we are fighting for. Anything < 0.01% at 1Khz is OK and will not be noticed in listening experience witch is all about. Sims are just cartoons and impressive THD numbers marketing arguments.
 
Last edited:
This is my last modification of the CFA amp. The gain stage is a current conveyour, output stage is my implementation of the HEC OPS.

The phase margin is 86 degree, gain margin is 11dB

THD1k is 2.6ppm, THD20k is 5.6ppm, THD40k is 25ppm all at 50W on 8ohm load

The loop gain(LG) could be changed by changing R36 value.
Interesting that distortion is going somewath down with lower LG.
BR Damir

P.S. Manso, using your CM enhancement distortion is going down but slightly


Good loop response - only a few dB down at 20 kHz. But, try to simplify a bit eg 4 transistors for front end current sources? A zener and a resistor give same performance. Simpler is better.
 
Originally Posted by wahab
"Good numbers overall but THD alone is not always indivative
of systematic good linearity in all fronts , tests at the same
power using a 19+20KHz 1/1 sine waves as well as the usual
400 + 7KHz 4/1 would be of interest.

Also , distorsion at 10KHz is more adequate than THD20K
wich do not produce audible THD since the first harmonic
is at 40KHz , heck , even 10KHz harmonics are not audibles."


Wahab, a few posts ago you were complaining about crappy CFA and how bad they were compared to VFA, now I see a change of position. What happened?

😉
 
Looking at the whole landscape, it seems that the input stage is (and has to be ) the dominant pole in a well designed CFA, with modern fast devices. And who want to reduce the speed of the loop itself, loosing all the benefits of such a topology ?
The impedance of the feedback resistance, charged by the parasitic capacitance of the emitter, is the best and simplest way to set the overall bandwidth for a flat curve.
But this capacitance is non linear: increasing the feedback impedance source reduce the bandwidth to the point there is no more peak in the response curve, but, in the same time, increase distortion.
As i don't see how this distortion can be canceled, i doubt any complicated assembly for this input stage, apart Constant Current Source, will bring a huge benefit.
The Dadod's work can be seen as a good demonstration of this: as it is said to measure ~0.002% with an awfully limited bandwidth and slew-rate, while VSSA, as an example, measure some 0.001 %. at 50W too with a bandwidth flat to several MHz and average slew-rate for a CFA, due to the miller cap.
This miller cap was a way to reduce feedback impedance and HD while it reduce slew-rate, keeping stability, kind of a compromise.
The main mistake in Dadod's schematic was to use the collector of the input stage with high parasitic capacitance to enter the feedback.

The designer experienced to VFA has to change his mind and look for slew rates instead of impressive HD numbers because it is what we are fighting for. Anything < 0.01% at 1Khz is OK and will not be noticed in listening experience witch is all about. Sims are just cartoons and impressive THD numbers marketing arguments.

If you did not recognize before was loop gain and here is amp gain.
 

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Originally Posted by wahab
"Good numbers overall but THD alone is not always indivative
of systematic good linearity in all fronts , tests at the same
power using a 19+20KHz 1/1 sine waves as well as the usual
400 + 7KHz 4/1 would be of interest.

Also , distorsion at 10KHz is more adequate than THD20K
wich do not produce audible THD since the first harmonic
is at 40KHz , heck , even 10KHz harmonics are not audibles."

Distorsion at 10 or 20 kHz is significative as it is a good indicator of Slew Induced Distorsion which it shows up much sooner than Transient Intermodulation Distorsion.
 
If your curve was open loop, it is VERY good, indeed, my mistake.

What's the slew rate and little signal square waves ?
Looking at your closed loop, you can surely achieve ~4MHz, closed.

It was not open loop gain but loop gain or feedback level.
I have to simulate slew rate yet, this will follow.

P.S. nobody is commenting on very low feed back here!