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Old 5th July 2013, 01:01 PM   #41
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Re: "It's just that the bases need to be bias'ed around ground."

Can be done by applying a small current from the Supply Rails with CCS's to the Emitters of Q10+11 and Q18+19 respectively, whilst retaining R14+15 (different value).
Long time since I was involved with this type of Circuit topology!

Anyway, isn't there a noise trade-off with the FET inputs?
Usually Power Amplifiers are driven from a Low Impedance Source.

Just some thoughts
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Old 5th July 2013, 07:05 PM   #42
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I was under the impression that the 2SK170s were coveted low noise input transistors. They're obsolete though. What I like about them is the relatively high Idss of 10mA, which makes for a rather strong input stage. At least in simulation, I've tried a bunch of different devices, but none come close in THD performance to the 2SK170's.

I haven't tried 550C as input devices running on 10mA, only on 2.5mA. The IPS current may actually be the main contributor to THD reduction.

One thing is for sure, the performance is a great deal worse without the input stage. It's not intended to be driven directly by an input signal, but the control (error) signal instead.

As for input impedances, I wanted to give an eventual amp a line impedance of 47K, buffered by a unity gain opamp. An opamp will drive the IPS input as it is rather low ohmic to mitigate noise and lessen the impact of the feeback input pole. This way I can be flexible about the feedback network impedance

I think I want to stick to JFETs as IPS input devices, but I don't really know what would be modern, good substitutes for SK170s.
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Old 6th July 2013, 12:27 AM   #43
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lsk170 from linear systems or the dual version lsk389 are both current production
parts.
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Old 6th July 2013, 02:40 AM   #44
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Default Philips BF862

and BF862 from Philips.

Maybe still better !

http://www.nxp.com/documents/data_sheet/BF862.pdf
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Old 7th July 2013, 07:36 AM   #45
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Thanks! I'll have tro try those, though I don't have models for them. For simming purposes I've settled on BC550 now, I found the IPS to optimally work with them running an LTP current of 5mA.

This has a side benefit that the IPS shunt currents when overdriven remain small too, no more than the LTP can provide.

For this next iteration I applied another benefit of this topology which was not obvious from the previous schematics; which is that the IPS and the VAS front-end can run on its own low power supply.

The only reason the VAS supplies are relatively high, is to facilitate the desired output swing. Other than that, the high supply is not needed at all. One would cope with this in the IPS by using high Vceo transistors, or put zeners in the rails to provide voltage drop / power dissipation.

Eventhough the IPS supply was reduced to +15/-15V the performance remains the same. Especially because I progammed the IPS output to sit 'halfway' the available output swing (7.5V).

I've also redone the layout a bit in such way that the VAS input is a bit better to discern and pull apart. One can now clearly see that what compromises the VAS actually consists of two parts. The first part takes a voltage and converts it to a differential complementary current output (collectors of Q10 and Q17). Then there is the second part, the current mirrors which form the load of the differential current output. So, basically, the VAS as a whole is actually one-and-a-half stage

There's a third modification I made. Now I separated the supplies, I also upped the VAS mirror supplies for a larger output swing. Scaling up the VAS output is easy. Since the VAS front end is a current output I no longer have to be concerned about voltage swing. Therefore I don't need to change anything to the front-end. All one would have to do to increase outputswing range is to raise the VAS supply and increase the zener values of D1 and D11; they cope with the additional voltage and dissipate the associated power so that Q10 and Q17 can be low noise, moderate Vceo types still. Oh and the hawksford cascode bias (R12) needs to be picked such that the cascode bias rail runs about 5mA.

I've actually bested myself as I can now do 250KHz, at this increased output swing and still keep the THD meter at 0.000%

I've also made an 1KHz spectrum plot to show the harmonic content of the circuit. The 2nd and 4th harmonic are gone into the noise floor of -169dB. The 3rd harmonic is still visible at roughly -135dB and the 5th barely visible at -155dB.

I've been able to push the even harmonics to under the noise floor, but I somehow can't make the odd harmonics budge. Overall I think this is stellar performance eventhough it's just a sim, though based on a reallife circuit

Is the schematic better to view now? It's rather kingsize but now the connecting dots should all be clearly visible.

Edit: Oh, and a little detail, the circuit is loaded by a purely capacitive load of 39uF, it equals a reactance of about 4 ohms with a 1KHz sine output. It's all stable
Attached Images
File Type: png VAS3.png (69.0 KB, 404 views)
File Type: png VAS3-1K.png (53.2 KB, 400 views)
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Last edited by MagicBox; 7th July 2013 at 07:42 AM.
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Old 7th July 2013, 02:58 PM   #46
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I guess all what's left to say is "build a darn amp with it"
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Old 8th July 2013, 07:03 AM   #47
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How would one apply TPC or TMC to my VAS? I have no loop Cmiller. Well, I sort of do: C3. But since input is not rail referenced, where would I tie to the resistor? Would GND work? Or will I have to introduce a low Z reference for the resistor to connect to? This is the issue I have with TPC. Once would think: Apply a 2nd order filter, but the problem is where the resistor node goes. I even think under classic conditions, the supply rail isn't the right location to tie the resistor to.
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Old 8th July 2013, 10:54 AM   #48
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Quote:
Originally Posted by MagicBox View Post
I even think under classic conditions, the supply rail isn't the right location to tie the resistor to.
Indeed. In the classic case, the resistor should go to ground, not the rail. See pages 9 to 11 of my paper on two-pole compensation (if reading the whole paper, please be sure to read the addendum, which is the very last page in the PDF after the references):

http://tinyurl.com/TwoPoleCompensation-pdf

Distributed by kind permission of the Audio Engineering Society.
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Old 8th July 2013, 11:45 AM   #49
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Thanks Harry, I'll give it a read =)
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Old 8th July 2013, 05:52 PM   #50
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Well, I finally managed to pull an AC plot from the schematic without the sim crashing

It shows a few oddities. Indeed the 'evil' zero at around 50MHz. But the thing that strikes me as odd is that the phase has turned much more than 180 degrees at 0dB gain. Yet the circuit is perfectly stable. I'm thinking the AC analysis doesn't spit out entirely correct data.

I've tried TPC quickly, but then the sim crashes again O.o.

What do you think of the plot?
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