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Old 16th May 2013, 06:21 PM   #11
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Quote:
Originally Posted by mcd99uk View Post
Yes, no problem. What would like measured?
Square and gain + phase. Plots are good the way it is, let's look for capacitive loads. I would not prefer so much driver stages for driving MOSFETs.
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Old 16th May 2013, 07:08 PM   #12
mcd99uk is offline mcd99uk  United Kingdom
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I know what you mean by driver stages but most are to do with implementing the HEC.

Here are plots you wanted with 0.1u set with 0.1R attached directly to V(FB). Otherwise, the LR output filter would shield the amp from the load. I figure this is a more extreme test.

Let me know if you want any more plots / measurements.
Attached Images
File Type: jpg compdiff 2 phase test capacitive.jpg (172.5 KB, 180 views)
File Type: jpg compdiff 2 square wave capacitive.jpg (127.5 KB, 164 views)
File Type: jpg AC analysis capacitive.jpg (162.9 KB, 148 views)
File Type: jpg compdiff 2 capacitive.jpg (301.6 KB, 165 views)

Last edited by mcd99uk; 16th May 2013 at 07:13 PM.
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Old 16th May 2013, 07:33 PM   #13
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Quote:
Originally Posted by mcd99uk View Post
I know what you mean by driver stages but most are to do with implementing the HEC.

Here are plots you wanted with 0.1u set with 0.1R attached directly to V(FB). Otherwise, the LR output filter would shield the amp from the load. I figure this is a more extreme test.

Let me know if you want any more plots / measurements.
Looks stabile like rock . One more plot, extreme 1uF, Square 10kHz. This is nice amp, sounds (or will sound) like this too I'm sure. I would like to look at semiconductors but text is very small. Bigger schematic will help.
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Old 16th May 2013, 08:47 PM   #14
mcd99uk is offline mcd99uk  United Kingdom
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Thank you for the nice words about my amp. Here is the plot you wanted. I will try to post up a larger schematic for you.

It does seem very stable as long as there is 0.1R in the capacitance it is pretty much a case of choose your value.

but for now here is the plot
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File Type: jpg compdiff 1u 10k sq wave.jpg (129.7 KB, 146 views)
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Old 18th May 2013, 02:40 PM   #15
mcd99uk is offline mcd99uk  United Kingdom
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Finalised circuit diagram

This is what I am going to prototype.
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File Type: jpg compdiff 4.jpg (278.3 KB, 104 views)
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Old 19th May 2013, 11:38 AM   #16
AndrewT is online now AndrewT  Scotland
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You removed C4 output to aground.
What did it do that required it's removal?

4stage EF is unusual. Why did you adopt it?
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Old 19th May 2013, 01:44 PM   #17
mcd99uk is offline mcd99uk  United Kingdom
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Andrew, C4 was only in place to allow for simulating the amp into capacitive loads to check for stability into extreme loads.

As for the 4 stage EF. I'm having problems finding a way of losing one of the last stages as the HEC configuration produces biasing voltages for higher Vgs MOSFETS. One of the EF stages is used to drop voltage. I thought of a way of dealing with this. This was to lose a stage (Q9, Q10) and change the voltage divider made up of R28, R29 and R32. This worked but square wave stability into a 1u 0.1R test load (c4) was much reduced. Maybe the base stopper resistor will need changing as well?? Had to increase C3 as well to keep stability.

I think its to do with the effective increased base stopper resistances. The 4 stage solution gave better stability into these loads and a reduced tendency to oscillate on square waves into difficult loads.

What do you think? Schematic and plot attached.
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File Type: jpg compdiff 5.jpg (274.3 KB, 95 views)
File Type: jpg compdiff 5 square wave 1u.jpg (140.5 KB, 58 views)
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Old 19th May 2013, 03:28 PM   #18
AndrewT is online now AndrewT  Scotland
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If C4 is simulating a capacitive cable, or a capacitive load, then you have attached it to the wrong side of the Pi version of the Thiele Output Network.
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Old 19th May 2013, 05:36 PM   #19
gootee is offline gootee  United States
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Quote:
Originally Posted by transistormarkj View Post
I don't think it's a good idea to use the LTSPICE "default diode" for D5 & D6; much better to download a .MODEL of the actual diode you actually plan to use (1N914B??). I'm also concerned that C4 may be waaaay too big. See Cordell's book pp. 199-200 "The Speedup Capacitor".
Mcd99uk,

The point was that you are using bogus diode models, there. You must use a diode that can actually be purchased and installed.

So, initially at least, you have to right-click on each semiconductor that has no part number and select a real part from the list of built-in models. If you don't like any of the parts that already have models provided, then you will need to download a model for a different part.
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Old 19th May 2013, 05:38 PM   #20
mcd99uk is offline mcd99uk  United Kingdom
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C4 was for simulating a capacitive load directly on the MOSFET output. My understanding is that the pi network is like a shield to allow conditionally stable amplifiers to be stable by shielding the capacitive load (speakers + cables). I would like to get my amp stable so that the pi network is optional and will be included as a "belt and braces" measure.
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