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Old 18th April 2013, 07:21 PM   #1
matze is offline matze  Germany
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Default Stability analysis of EF output stages

When playing with one of the amplifiers in Bob Cordell's book, I found a surprising case of instability in a double-EF output stage.

The amplifier is the example from the book, page 63. It normally uses the not too fast MJL2119x transistors. Because I saw a problem with robustness against the output series resonance at high frequencies, I tried to use the faster MJL3281/1302. To my surprise, the output stage became completely unstable, bursting into oscillation of about 8MHz during the positive half-wave. This can be seen below in instability.png. If one introduces base-stopper resistors of 10R, the circuit again is stable, whereas 2R are not enough. The quiescent current was about 50mA as in the case with MJL2119x.

Although not that extreme, I know this from experience. The sound of an amplifier may change more than reasonable, if one changes a little bit the base-stopper resistors or changes a little bit the unity gain crossover of the global NFB. For another project, I therefore decided to completely abandon darlingtons in the output stage.

One can always question the accuracy of a simulation model that does not even include stray capacities and inductances and that heavily depends on the transistor models. Nevertheless it would be nice to have a better way to evaluate the OPS stability than looking at the transient response.

After all, a multiple-EF contains a tight feedback loop around the transistors that should be accessible to analysis via Bode diagram. The three pictures show a proposal for that.

Below, ef-mjl21194.png tries to analyse the loop of the original OPS. In order to break the intrinsic feedback loop, the emitter current of Q2 is measured by R3 and translated into the original current by G1, leaving the emitter of Q2 at almost constant potential. (This even more correctly would be possible with a 0V-voltage source in place of R3 and a current-dependent current source instead of G1, depending on the current through the former voltage source)
Thus, Q1 and Q2 do not "see" the feedback signal. From 20mA to 2A output current (stepping of IE), the unity gain crossover appears to be in the region 20 to 30 MHz, phase margin is always larger than 90 degrees. (BTW, the value of R7 - VAS output resistance - has no influence at all).

The difference between ef-mjl3281.png and ef-mjl3281-10R.png is the base stopper resistor R2 in the latter. One sees lower unity gain crossover freqencies and better phase margins. Nevertheless, even the former Bode diagram would suggest stability.


Are there any proposals how to better evaluate the OPS stability and the "distance to the disaster"? I have the impression that my simple approach does fail. One point is of course that only one half of the OPS is included into the model. But in the positive half wave, the negative OPS should not contribute to the behaviour.

Does anybody have a hint how one should evaluate the intrinsic loop of multiple-EF output stages in the frequency domain?


BR,
Matze

instability.png

ef-mjl21194.png

ef-mjl3281.png

ef-mjl3281-10R.png
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Old 18th April 2013, 11:15 PM   #2
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I haver found that the VAS stage usually is the source of oscillation.
I usually put a 120pf from base to collector to limit its bandwidth.

In your circuit it looks like q6 and q10 need this capacitor.
You will need to experiment with the value to get a compromise between no oscillation and losing bandwidth too much.
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Old 19th April 2013, 12:37 AM   #3
Bonsai is offline Bonsai  Taiwan
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Matze, you should always include base stoppers in an EF. If you add a bit of inductance in the base of your drivers, you will really see them sing (say 5 to 10nH).

Another trick that works well is ferrite beads in the base, right next to the device.

I use EF3's in my designs and they are very stable - you can take a look at my site below- especially the write up on the e-Amp.
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Old 19th April 2013, 02:11 AM   #4
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Small capacitors limit the BW, i see commercial brands usually limit at predriver, but we're limit at driver. Which're better? because predriver devices usually have high Ft more than drivers.
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Old 19th April 2013, 03:31 AM   #5
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Quote:
Originally Posted by Bonsai View Post
Matze, you should always include base stoppers in an EF. If you add a bit of inductance in the base of your drivers, you will really see them sing (say 5 to 10nH).

Another trick that works well is ferrite beads in the base, right next to the device.

I use EF3's in my designs and they are very stable - you can take a look at my site below- especially the write up on the e-Amp.
Bonsai,
Totally agree with adding base inductance to really bring out the problem as well as better modeling of a real circuit (somewhat surprised that the oscillation occured without adding these). Another oscillation inducing parasitic is the emitter to ground capacitance.

I'm not opposed to ferrites like some but I do put resistors across them.

I haven't figured out a better method for assessing margin (other than discrete transistor small signal model but this is very cumbersome, and not very accurate) but increasing the parasitics to well beyond practical gives a good indicator.

edit: Attached a good article by Dennis Feucht on the subject, p.s. Spice lets you enter negative resistances.

Thanks
-Antonio
Attached Files
File Type: pdf col_1017.pdf (120.9 KB, 79 views)

Last edited by magnoman; 19th April 2013 at 03:46 AM. Reason: reference
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Old 19th April 2013, 04:40 AM   #6
jxdking is offline jxdking  China
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Only upper half wave is unstable.

I guess it is the voltage bias of the EF causes the oscillation. Voltage bias network will lose control when frequency is high enough.

Try to put an capacitor paralleling to the voltage multiplier.
See what will happen.
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Old 19th April 2013, 06:13 AM   #7
matze is offline matze  Germany
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Quote:
Originally Posted by jxdking View Post
I guess it is the voltage bias of the EF causes the oscillation. Voltage bias network will lose control when frequency is high enough.

Try to put an capacitor paralleling to the voltage multiplier.
See what will happen.
Hi,
this helps. [Should have figured out that on my own .] I will give Bob a hint, maybe he can add the capacitor in his next edition.

Quote:
Originally Posted by Bonsai View Post
Matze, you should always include base stoppers in an EF. If you add a bit of inductance in the base of your drivers, you will really see them sing (say 5 to 10nH).

Another trick that works well is ferrite beads in the base, right next to the device.
Bonsai,
I will have a look onto your design. The question for me is: if I include e.g. 10R as base stopper or a ferrit bead, how far am I then from oscillation (comparable to: how large are the stability margins in the global NFB loop)? My experience with amplifiers is that even the smallest tendencies of instability may change the sound, at least in a high-end audiophile system.

Quote:
Originally Posted by magnoman View Post
I haven't figured out a better method for assessing margin (other than discrete transistor small signal model but this is very cumbersome, and not very accurate) but increasing the parasitics to well beyond practical gives a good indicator.

edit: Attached a good article by Dennis Feucht on the subject, p.s. Spice lets you enter negative resistances.
Antonio,
thanks for the paper. It seems to be the kind of thing I was looking for.

Quote:
Originally Posted by nigelwright7557 View Post
I haver found that the VAS stage usually is the source of oscillation.
I usually put a 120pf from base to collector to limit its bandwidth.
Hi,
at least in my attempt to produce the Bode diagrams, the VAS output impedance (R7 in ef-mjl21194.png) does not not have an influence at all. So even if one reduces the overall open-loop gain, this would not improve the intrinsic OPS stability.
But this is only a result of this simulation approach, and I'm not sure, whether I'm doing it right.

Thank you all and BR,
Matze
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Old 19th April 2013, 08:25 AM   #8
lineup is offline lineup  Sweden
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I see people use 2R2, 4R7 and 10R for base stoppers of BJT output transistors.
I think one should use at least 4R7.

Then I see people use base stoppers for the drivers, too.
Especially when using triple EF stages.
But what value I am not sure of.
I have a guess 22R or 47R are good values.

Having a capacitor 1uF or 2.2uF across VBE multiplier I have seen many.
I never understood why ... now I know why!

Thanks for an interesting topic, Matze
Regards
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Old 19th April 2013, 10:15 AM   #9
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Quote:
Originally Posted by matze View Post
When playing with one of the amplifiers in Bob Cordell's book, I found a surprising case of instability in a double-EF output stage...

Are there any proposals how to better evaluate the OPS stability and the "distance to the disaster"? I have the impression that my simple approach does fail. One point is of course that only one half of the OPS is included into the model. But in the positive half wave, the negative OPS should not contribute to the behaviour.

Does anybody have a hint how one should evaluate the intrinsic loop of multiple-EF output stages in the frequency domain?
...
I recommend you look at this link to see Ovidiu's simulation. I haven't really studied it yet but looks impressively detailed and carefully analysed.

Best wishes
David.

Last edited by Dave Zan; 19th April 2013 at 10:18 AM.
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Old 19th April 2013, 12:22 PM   #10
Bonsai is offline Bonsai  Taiwan
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Quote:
Originally Posted by magnoman View Post
Bonsai,
Totally agree with adding base inductance to really bring out the problem as well as better modeling of a real circuit (somewhat surprised that the oscillation occured without adding these). Another oscillation inducing parasitic is the emitter to ground capacitance.

I'm not opposed to ferrites like some but I do put resistors across them.

I haven't figured out a better method for assessing margin (other than discrete transistor small signal model but this is very cumbersome, and not very accurate) but increasing the parasitics to well beyond practical gives a good indicator.

edit: Attached a good article by Dennis Feucht on the subject, p.s. Spice lets you enter negative resistances.

Thanks
-Antonio
Thanks for that Antonio - I will take a look.
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