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Old 14th April 2013, 05:37 PM   #1
kingneb is offline kingneb  United States
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Default FET Static Power Dissipation

For a FET I am using in an output stage, the Gate to Source voltage needs to be about 4 volts for proper biasing. I set the bias to something a little above 4. The FET is conducting about 1 amp of current at idle. The power supply is +/-40 volts. In class AB, there is 0 volts at the output at idle, so 40 drain to source.

Does this mean it will dissipate 40 watts at idle, or do I use the RDSon value to compute this (Power Dissppated = I^2 * RDSon)?
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Old 14th April 2013, 06:02 PM   #2
CBS240 is offline CBS240  United States
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V X I = P

40V X 1A = 40W
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Old 14th April 2013, 06:05 PM   #3
kingneb is offline kingneb  United States
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Normally do Class AB fet stages dissipate this much static power at idle? If so, heat-sinking is the biggest must in the world.
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Old 14th April 2013, 06:18 PM   #4
AndrewT is offline AndrewT  Scotland
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+-40Vdc supply equals 80Vdc rail to rail.
1A passing as output bias from rail to rail (also equals zero output current) amounts to bias dissipation = 80W
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Old 14th April 2013, 06:26 PM   #5
kingneb is offline kingneb  United States
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I am just doing half the system for clarification sake. Yes, the entire system would be 80 watts. My question is, am I biasing too much into class A or is this normal?
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Old 14th April 2013, 06:58 PM   #6
kingneb is offline kingneb  United States
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The FETs are IRFP240 for the nmos and IRFP9240 for the pmos.
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Old 15th April 2013, 10:54 AM   #7
AndrewT is offline AndrewT  Scotland
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In Borbely's opinion you are biasing too much for FET outputs.
He suggests at least 500mA irrespective of how many output pairs are adopted.
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