Dan,
That's pretty much it, but what comes to mind immediately from your example is that you probably won't have enough current gain (or collective beta) for the VAS to drive your simple output stage. People do do it, or have done it, and perhaps it could be made to work quite well with some of the snazzy transistors that Cordell uses, but in general the load presented to the VAS will be too low.
What happens is that the load, say 4 ohms for the speaker, is reflected through transistors, multiplied by their betas. So it could be as little as 4 times 20 times 100. That means you end up losing gain in the CE stage, the VAS, because it isn't seeing as high a load as you think. (This is before we come to the question of whether the VAS has enough current to meet the needs.) While another arm coming down from V+ has the possibility of dropping more muck from the supply onto the signal path, what happens in practice is that the extra gain you recover means that the feedback can do a better job and you have a net improvement. And with the extra transistor you can now largely ignore the driving current from the VAS.
Of course there will be some people here, and around, who prefer the lower gain solution because they think feedback is a bad thing. Personally I think this is rot and has nothing to do with feedback itself, or standing currents. It is possible that more muck is coming from the supply and it has been done badly, but in these simple designs it is mainly because they choose such a low gain that the VAS load always dominates and is unaffected by the speaker load. That means that you are getting the voltage amplification and not some amplification dependent on the load being presented by the speaker at that moment. Certainly that is my take on what is actually happening in the whole feedback debate; that the feedback element of it is a total red herring.
As to curves and switch off, the bit to look at is the capacitances or residual charge at the junctions. Cordell covers this fantastically and it's worth reading this perhaps alongside Doug Self's completely different take on output stages, which is much more distortion based. The problem just about only arises for CFPs though you might go marginal if you want to save on a heatsink and keep your drivers cool. As an aside it is very interesting to contrast how differently Self and Cordell view output stages. Both agree on paralleling output devices. For Self the distortion improvement is worth the extra pair but, perhaps not content with the Englishness of puny 70W amplifiers, Cordell gives us a super treatise on residual charge possibly to justify racking up as many output pairs as he would like.
Other than for output transistors, and higher current drivers, I'm not sure how much more you will get from the curves. I'll probably be jumped on if I say that the transistors are switched on, are in their operating region and we have means to linearise the output. You can choose transistors that are a bit too fast, in which case you'll need stopper resistors and at least a 100MHz scope to see what's happening, though there are some methods to see telltale warnings show up in simulation by looking well into the MHz region.
I applaud your wish to have every value 'designed' but I'm not sure we are there yet. This is the sort of thing you might do on the bench, decide whether a 68R or 100R is better than the 82R you chose originally. And I think you'd be surprised by how much everyone draws on experience of what works and what others have done. And there are still plenty of places you can stamp your own mark on a design.
That's pretty much it, but what comes to mind immediately from your example is that you probably won't have enough current gain (or collective beta) for the VAS to drive your simple output stage. People do do it, or have done it, and perhaps it could be made to work quite well with some of the snazzy transistors that Cordell uses, but in general the load presented to the VAS will be too low.
What happens is that the load, say 4 ohms for the speaker, is reflected through transistors, multiplied by their betas. So it could be as little as 4 times 20 times 100. That means you end up losing gain in the CE stage, the VAS, because it isn't seeing as high a load as you think. (This is before we come to the question of whether the VAS has enough current to meet the needs.) While another arm coming down from V+ has the possibility of dropping more muck from the supply onto the signal path, what happens in practice is that the extra gain you recover means that the feedback can do a better job and you have a net improvement. And with the extra transistor you can now largely ignore the driving current from the VAS.
Of course there will be some people here, and around, who prefer the lower gain solution because they think feedback is a bad thing. Personally I think this is rot and has nothing to do with feedback itself, or standing currents. It is possible that more muck is coming from the supply and it has been done badly, but in these simple designs it is mainly because they choose such a low gain that the VAS load always dominates and is unaffected by the speaker load. That means that you are getting the voltage amplification and not some amplification dependent on the load being presented by the speaker at that moment. Certainly that is my take on what is actually happening in the whole feedback debate; that the feedback element of it is a total red herring.
As to curves and switch off, the bit to look at is the capacitances or residual charge at the junctions. Cordell covers this fantastically and it's worth reading this perhaps alongside Doug Self's completely different take on output stages, which is much more distortion based. The problem just about only arises for CFPs though you might go marginal if you want to save on a heatsink and keep your drivers cool. As an aside it is very interesting to contrast how differently Self and Cordell view output stages. Both agree on paralleling output devices. For Self the distortion improvement is worth the extra pair but, perhaps not content with the Englishness of puny 70W amplifiers, Cordell gives us a super treatise on residual charge possibly to justify racking up as many output pairs as he would like.
Other than for output transistors, and higher current drivers, I'm not sure how much more you will get from the curves. I'll probably be jumped on if I say that the transistors are switched on, are in their operating region and we have means to linearise the output. You can choose transistors that are a bit too fast, in which case you'll need stopper resistors and at least a 100MHz scope to see what's happening, though there are some methods to see telltale warnings show up in simulation by looking well into the MHz region.
I applaud your wish to have every value 'designed' but I'm not sure we are there yet. This is the sort of thing you might do on the bench, decide whether a 68R or 100R is better than the 82R you chose originally. And I think you'd be surprised by how much everyone draws on experience of what works and what others have done. And there are still plenty of places you can stamp your own mark on a design.
Using peak currents to determine the suitability of devices in each stage is critical to getting the amplifier to meet the current demand of the speaker.
That is a quite different design procedure compared to determining a suitable quiescent current for each stage.
I always start with peak output current and work back through the stages selecting suitable devices. And using temperature de-rated SOAR for each device.
After a suitable device has been chosen, I then try to identify a suitable bias current. For me that is much less defined.
This Thread may well give me a better understanding of what is required for driver bias.
Certainly, the practice of adopting 5 to 6mA for driver bias in a CFP seems to me quite wrong.
Where the driver is a CFP and the pre-driver (two stages inboard of the output EF) then a 5 to 6mA bias would seem far more appropriate. Here the common emitter driver could have 50mA to 150mA of bias current. Yes, as much as or even more than the output stage.
That is a quite different design procedure compared to determining a suitable quiescent current for each stage.
I always start with peak output current and work back through the stages selecting suitable devices. And using temperature de-rated SOAR for each device.
After a suitable device has been chosen, I then try to identify a suitable bias current. For me that is much less defined.
This Thread may well give me a better understanding of what is required for driver bias.
Certainly, the practice of adopting 5 to 6mA for driver bias in a CFP seems to me quite wrong.
Where the driver is a CFP and the pre-driver (two stages inboard of the output EF) then a 5 to 6mA bias would seem far more appropriate. Here the common emitter driver could have 50mA to 150mA of bias current. Yes, as much as or even more than the output stage.
This goes for both driver and output stages. If you bias the driver stage so as it is always in class A, the bias would have to be significant and also significant Pd. (for a driver transistor) You have to take into acount that actual speaker Z may dip to 1/2 nominal Z, and that power BJT's, even the newer ring emitter types (RETs) loose significant Hfe and AC Hfe drops with frequency above the Ft peaked current, although they are many steps above the old school epitaxial 2N3055.
Looking at a MJl21195, Hfe drops to 50% at around 10A. The dynamic current demands of a speaker may exceed this for a short period of time. This is why it may be easier to drive two pair in paralell instead of one pair when hit with a difficult di/dt load. This is one advantage Mosfets have over BJTs, they don't loose 'current gain' as current increases and effective Ft actually increases with Id. Part of the reason they can be problematic and oscillate under load. BUT there are other differences, of course.
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Good stuff everyone, you've helped a lot! I do understand that the answer as to ''what is the correct current for this stage" isn't always black and white, but I just want to at least know what the parameters are that I am trying to line up. In this regard I feel a lot more educated on the matter from this thread.
@Christian Thomas:
You mentioned that my simple example would likely not have the combined beta to load the VAS correctly. Is this where adding a pre-driver comes into play?
As far as paralleling output transistors, would I be correct to think that the betas would sum in that situation? In other words, if I built an amp with 2 transistors in parallel for each half of the output stage, but otherwise no different from a non parallel design, would each transistor simply supply half the current it would have in the single configuration?
So using completely random numbers here, say I need 5 amps for full power, with a single, that transistor will try to supply the 5 amps, but simply by paralleling in another transistor, each one will only supply 2.5 amps, right?
And by extension, the current gain of the drivers would only need to be half of what it would have needed to be in the non parallel version, right?
Of course, I assume my simple example earlier would still fall beta-wise even in this situation.
I do have both Cordell and Self's books, and am pretty sure at Cordell goes over this. I have found that I read Cordell's book to get the root understanding of things. I think Self's book will be of more value to me when I get a little more hang of the basics.
@Christian Thomas:
You mentioned that my simple example would likely not have the combined beta to load the VAS correctly. Is this where adding a pre-driver comes into play?
As far as paralleling output transistors, would I be correct to think that the betas would sum in that situation? In other words, if I built an amp with 2 transistors in parallel for each half of the output stage, but otherwise no different from a non parallel design, would each transistor simply supply half the current it would have in the single configuration?
So using completely random numbers here, say I need 5 amps for full power, with a single, that transistor will try to supply the 5 amps, but simply by paralleling in another transistor, each one will only supply 2.5 amps, right?
And by extension, the current gain of the drivers would only need to be half of what it would have needed to be in the non parallel version, right?
Of course, I assume my simple example earlier would still fall beta-wise even in this situation.
I do have both Cordell and Self's books, and am pretty sure at Cordell goes over this. I have found that I read Cordell's book to get the root understanding of things. I think Self's book will be of more value to me when I get a little more hang of the basics.
Yes, I could have been clearer in the second para; that additional arm I mentioned has a transistor in it!. A pre-driver, as you say. It makes a night and day difference to the loading on the VAS, as I'm sure you can see.
On the paralleling of output devices, nothing changes. Yes, each one provides half of the current to the speaker, so each one has half the base current, meaning that the current from the driver is the same in total.
I'm not going to say that your simple example would actually fail beta-wise, (and nothing has changed on this score with an additional output pair) not least because it has been done plenty of times before, just that I can't see that much to recommend it when there is a very good, easy alternative.
Of the two books, the Cordell book is much more instructional with a genuine desire to teach, and at which he succeeds. It is also more ordered. The Self books tend to take you on his journey, which means that you are wherever he happens to be at that time, and you tend to have to pick out gems. I look forward to his journey taking him to a place where he sees power supplies as important.
Another book you might consider if you don't have it already is Horowitz and Hill's Art of Electronics which is beautifully written and really does take you by the hand.
The driver would have to supply the base current for one transistor at 5A Ic, or 2 times the base current for the two at 2.5A Ic each. If the Hfe for that specific transistor droops at say 4A, then the total base current for the single device would be higher than the sum of the paralelled devices. Perhaps the simplicity of a single pair is preferred in the design, so the driver stage might have to be beefed up or a pre-driver stage might be used. These are the kinds of comprimises that every designer must mull through.
Figure 10.10 shows a good example of the fluctuation in driver current while driving full output current at 20KHz. It takes more di/dt or 'charge' to operate the output transistors at a higher frequency, both for turn-on and more importantly turn-off. Turn up a 100 to 500KHz sine signal with no load and measure the common mode bias.
Although this is a bit extreme for an audio amplifier, it shows the effect of the much larger internal capacitances of power transistors. Because the Z of a cap in inversely proportional to frequency, placing a cap between the base terminals of the outputs is a simple and popular way to 'suck out' the excess charge from the base to prevent cross conduction at higher frequency. Cross conduction can cause a mismatch in output Gm and thus distortions, and can lead to a meltdown. 
State flag of Tennessee. Locals sometimes refer to Knoxville as K-town.
Although this is a bit extreme for an audio amplifier, it shows the effect of the much larger internal capacitances of power transistors. Because the Z of a cap in inversely proportional to frequency, placing a cap between the base terminals of the outputs is a simple and popular way to 'suck out' the excess charge from the base to prevent cross conduction at higher frequency. Cross conduction can cause a mismatch in output Gm and thus distortions, and can lead to a meltdown. State flag of Tennessee. Locals sometimes refer to Knoxville as K-town.
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Many a great point and ots of great info here!
A bit more information:
1) Regarding Vce and Vcer (Vceo) ratings - today it's usually not a problem to find transistors that will withstand required voltages and tolerances between parts are not as high as in times past. A little background info - in most amplifiers the BE junction is bypassed by a resistor of some kind, the reason why this influences apparent breakdown voltage is becasue of C-B breakdown, which drives current into the base at high Vce and initially increases Ic, resulting in a formation of a 'knee' in the Vce-Ic curves at the extremes of Vce. If Ic becomes higher still, it's possible to provoke secondary breakdown. With B-E shunted with a relatively low resistance, this does not happen until actual C-E breakdown. However, most BJTs made in the last 20 years and more have higher Vcb breakdown than Vce, and the above is one reason why. Using this as a consideration for today's designs regarding output transistors is un-necessary but may still be for some driver stages.
2) There is no direct way to determine optimum Ic for drivers without knowing the topology, as there are many around. However, the 'ballpark figure' is always derived just as AndrewT said - examine what the expected currents are, and of course, make sure you are doing it for the worst case scenario. A small note here - it's almost unavoidable that heat will be generated in the said semiconductors, and it's also plausible to expect room temperature operation, so no need to use 0 deg C as a worst case scenario. In fact, the worst case temperature scenario is likely to be room temperature.
2) Beta drop at high Ic is a consideration that deserves serious merit, and apart from crossover, it may in some circumstance the next largest source of distortion. Case in point is a 4-ohm nominal Z speaker connected to an amplifier optimized for 8-ohm nominal Z operation. As was pointed out, multiple output pairs not only make things much easier regarding robustness, but result, at least at face value, in lower distortion. However, it comes at the price of an increase in capacitance the driver stage has to drive, and this influences the current requirements and therefore the bias current for the driver stage.
3) Some topologies make it possible to run the driver stages in class A, or in any case deeper AB than the output stage. Obviously power dissipation and SOA considerations for the driver stage apply. Driver stages with a separate emitter resistor connecting the emitters and no connection to the output can always work in class A and are generally better at sucking out the B-E charge when the output BJT must be turned off. Drivers with each their own emitter resistor (classic darlington) may not be able to do so, depending on the emitter resistor of the output stage, so in this case the current in the drivers may depend on the emitter resistor of the output stage. One caveat: output transistors, especially RET/LAPT and similar architectures have non-trivial Ree ('built in' bulk emitter resistance), in fact some of them can operate in single pair output stages without any external emitter resistors. Hence, if Re in the output stage is a consideration, consider that a protion of it may be 'hidden' inside the output BJT itself.
4) The 'speedup' cap between bases is applicable in more ways than one would normally expect. With a single resistor between driver emitters it's obvious, but it can also work with the classic darlington, and with a diamond buffer type output stage it's practically mandatory. In other words, Re of the drivers may not be the only part you want to look at
5) Ft considerations will not apply often to driver transistors, since the critical part in this regard is the output transistor. However, power dissipation issues normally take precedence in output stages so it is extremely rare to find an output stage where the bias current is optimized for Ft. In fact, the reason why high maximum Ft is desired, is not for it's highest value, but for the need to still have a reasonably high Ft at much lower currents (often less than a single percent of the maximum).
6) Beta drop in driver transistors can be an issue because the number of available part types is an ever shrinking number, sadly. So, for instance, even though the MJE1503x series are good drivers, they are good for fairly high currents (usually with a pre-driver, driving several pairs of outputs), while most Japanese parts will do a better job for single pairs. Why? The maximum Ic is a clue. Beta has a peak at some value of Ic which usually to a firs approximation is a percentage of maximum Ic. This is one reason why many Japanese drives seem to have fairly low max Ic the reason being they are optimized re Beta, for practical currents one finds in amplifiers with 1-2 output pairs. The MJE1503x series is specced for 8A max. Ic, typically 5-8 times lower, so closer to realistic Ic values found in driver use. High Beta translates to high input Z of the stage. This is always desirable because it means the part of this input Z that is reflected to the input Z of the previous stage is smaller, compared to the actual input Z of the previous stage. In other words, the input Z of the previous stage is to a greater extent dependent on the operating point of thet stage as set by well defined components, and less variable as a result of load reflection, tolerances of devices downstream and their operating points, as well as matching gm across the operating range and especially through the crossover region. This is always desirable. And, it pays to look carefully at drivers and pre-drivers in this regard as they will normally have much higher Beta than output transistors.
7) Within the above constraints, a good rue of thumb is the 10x rule. I.e, use at least 10x the output current as the stage bias current. This will of course not apply for the last stage (where power dissipation is the top consideration so class AB here), and often will not be practical for the drivers, but for them it's worth at least considering, although it may well prove enoug to just have a single digit multiple where the drivers are pushed into class A and remain there (at least at the edge of there) for worst case conditions of the output stage. It will invariable be possible for the pre-drivers if there are any. This is usually the point at which one starts and then optimizes from that.
A bit more information:
1) Regarding Vce and Vcer (Vceo) ratings - today it's usually not a problem to find transistors that will withstand required voltages and tolerances between parts are not as high as in times past. A little background info - in most amplifiers the BE junction is bypassed by a resistor of some kind, the reason why this influences apparent breakdown voltage is becasue of C-B breakdown, which drives current into the base at high Vce and initially increases Ic, resulting in a formation of a 'knee' in the Vce-Ic curves at the extremes of Vce. If Ic becomes higher still, it's possible to provoke secondary breakdown. With B-E shunted with a relatively low resistance, this does not happen until actual C-E breakdown. However, most BJTs made in the last 20 years and more have higher Vcb breakdown than Vce, and the above is one reason why. Using this as a consideration for today's designs regarding output transistors is un-necessary but may still be for some driver stages.
2) There is no direct way to determine optimum Ic for drivers without knowing the topology, as there are many around. However, the 'ballpark figure' is always derived just as AndrewT said - examine what the expected currents are, and of course, make sure you are doing it for the worst case scenario. A small note here - it's almost unavoidable that heat will be generated in the said semiconductors, and it's also plausible to expect room temperature operation, so no need to use 0 deg C as a worst case scenario. In fact, the worst case temperature scenario is likely to be room temperature.
2) Beta drop at high Ic is a consideration that deserves serious merit, and apart from crossover, it may in some circumstance the next largest source of distortion. Case in point is a 4-ohm nominal Z speaker connected to an amplifier optimized for 8-ohm nominal Z operation. As was pointed out, multiple output pairs not only make things much easier regarding robustness, but result, at least at face value, in lower distortion. However, it comes at the price of an increase in capacitance the driver stage has to drive, and this influences the current requirements and therefore the bias current for the driver stage.
3) Some topologies make it possible to run the driver stages in class A, or in any case deeper AB than the output stage. Obviously power dissipation and SOA considerations for the driver stage apply. Driver stages with a separate emitter resistor connecting the emitters and no connection to the output can always work in class A and are generally better at sucking out the B-E charge when the output BJT must be turned off. Drivers with each their own emitter resistor (classic darlington) may not be able to do so, depending on the emitter resistor of the output stage, so in this case the current in the drivers may depend on the emitter resistor of the output stage. One caveat: output transistors, especially RET/LAPT and similar architectures have non-trivial Ree ('built in' bulk emitter resistance), in fact some of them can operate in single pair output stages without any external emitter resistors. Hence, if Re in the output stage is a consideration, consider that a protion of it may be 'hidden' inside the output BJT itself.
4) The 'speedup' cap between bases is applicable in more ways than one would normally expect. With a single resistor between driver emitters it's obvious, but it can also work with the classic darlington, and with a diamond buffer type output stage it's practically mandatory. In other words, Re of the drivers may not be the only part you want to look at
5) Ft considerations will not apply often to driver transistors, since the critical part in this regard is the output transistor. However, power dissipation issues normally take precedence in output stages so it is extremely rare to find an output stage where the bias current is optimized for Ft. In fact, the reason why high maximum Ft is desired, is not for it's highest value, but for the need to still have a reasonably high Ft at much lower currents (often less than a single percent of the maximum).
6) Beta drop in driver transistors can be an issue because the number of available part types is an ever shrinking number, sadly. So, for instance, even though the MJE1503x series are good drivers, they are good for fairly high currents (usually with a pre-driver, driving several pairs of outputs), while most Japanese parts will do a better job for single pairs. Why? The maximum Ic is a clue. Beta has a peak at some value of Ic which usually to a firs approximation is a percentage of maximum Ic. This is one reason why many Japanese drives seem to have fairly low max Ic the reason being they are optimized re Beta, for practical currents one finds in amplifiers with 1-2 output pairs. The MJE1503x series is specced for 8A max. Ic, typically 5-8 times lower, so closer to realistic Ic values found in driver use. High Beta translates to high input Z of the stage. This is always desirable because it means the part of this input Z that is reflected to the input Z of the previous stage is smaller, compared to the actual input Z of the previous stage. In other words, the input Z of the previous stage is to a greater extent dependent on the operating point of thet stage as set by well defined components, and less variable as a result of load reflection, tolerances of devices downstream and their operating points, as well as matching gm across the operating range and especially through the crossover region. This is always desirable. And, it pays to look carefully at drivers and pre-drivers in this regard as they will normally have much higher Beta than output transistors.
7) Within the above constraints, a good rue of thumb is the 10x rule. I.e, use at least 10x the output current as the stage bias current. This will of course not apply for the last stage (where power dissipation is the top consideration so class AB here), and often will not be practical for the drivers, but for them it's worth at least considering, although it may well prove enoug to just have a single digit multiple where the drivers are pushed into class A and remain there (at least at the edge of there) for worst case conditions of the output stage. It will invariable be possible for the pre-drivers if there are any. This is usually the point at which one starts and then optimizes from that.
@CBS240
Thanks for the info. I thought it might be a Southern thing (one time big Skynyrd fan so not anti that sort of sentiment) but all I saw for K-Town in a search was a mini series about Korea-Town in LA. By complete coincidence I see from my Facebook feed that you had the man who should have been President in town today.
Thanks for the info. I thought it might be a Southern thing (one time big Skynyrd fan so not anti that sort of sentiment) but all I saw for K-Town in a search was a mini series about Korea-Town in LA. By complete coincidence I see from my Facebook feed that you had the man who should have been President in town today.
Can you post the circuit diagram for Cordell's basic amplifier.
Cordell had an article published in Wireless World some 20 plus years ago - an era for which I have disposed of my copies. The article may also have been published in Audio Amateur.
I remember seeing calculations for the level of current needed in a driver stage.
That had to do with speed (slew rate) of the output stage taking into account the Ft of the output devices. The output stages of the subject amplifier had the driver emitters tied by a cross-coupling resistor.
I don't have a copy of Cordell's book but expect he would have included the earlier material somewhere.
Michael J
Copyright
The book is extremely cheap for the content, BTW.
Designing Audio Power Amplifiers: Bob Cordell: 9780071640244: Amazon.com: Books
The book is extremely cheap for the content, BTW.
Designing Audio Power Amplifiers: Bob Cordell: 9780071640244: Amazon.com: Books
4) The 'speedup' cap between bases is applicable in more ways than one would normally expect. With a single resistor between driver emitters it's obvious, but it can also work with the classic darlington, and with a diamond buffer type output stage it's practically mandatory. In other words, Re of the drivers may not be the only part you want to look at
'Speed up' cap between output transistor base pins never speeds up performance. It actually slows down. Worse crossover distortion.
The reason to set up 1/10 static current is to let driver stage have the capability to draw out current from parasite capacitance of output transistor when the output transistor needs to be shut down.
If put 'speed up' cap there, the same problem, it will be more easier for it to charge up, but it would not like to release quickly. It will slow down output transistor to shut off.
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Copyright
The book is extremely cheap for the content, BTW.
Designing Audio Power Amplifiers: Bob Cordell: 9780071640244: Amazon.com: Books
Thanks Ian,
I managed to find the material on Bob Cordell's website - link provided http://www.cordellaudio.com/papers/another_view_of_tim_II.pdf
For the benefit of others interested, this 1980 article covers output stages illustrated by examples.
The first has a conventional Darlington output using power devices having ft of 1-Mhz. The driver emitter resistor values are 100R apiece and the preceding Vas runs at 5 m.a.
Cordell argues the turn off current available from the driver stage is only 8 m.a. so the current slew rate of the driven outputs is only 0.05 A/uS or 0.4V/uS into an 8 ohm load.
The second example uses a triple darlington output arrangement. The second stage driver transistors have emitters cross coupled by a 56R resistor, providing some 30 m.a. of cut off current.Such, in combination with power devices of 4-Mhz ft, improves the 8 ohm slewing to 6 V/uS.
The formula for current slew rate is given by ISR=2pi.ft.Ib
(Ib is the base current and ft is the rating for the output transistors).
Nowadays high power transistors with high ft and high gain are readily available and are relatively cheap - so there is a bit more scope to juggle the values within Cordell's equation.
Michael J
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