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Zero D 7th April 2013 11:57 PM

Buffer & Amp experiment
 
2 Attachment(s)
I was tinkering around in Multisim, & came up with these designs. Nothing special in the specs department :D but to me, they have some curious properties of which i'm trying to establish.

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Circuit A with global feedback

Load = 1 Ohm

Input = 0.775mV RMS @ 1kHz

Distortion @ 1kHz = 0.021%

Output = 548 mV RMS - Power = 302mW

-

Load = 10 Ohm

Input = 0.775mV RMS @ 1kHz

Distortion @ 1kHz = 0.018%

Output = 548 mV RMS - Power = 30.2mW

-

Load = 100 Ohm

Input = 0.775mV RMS @ 1kHz

Distortion @ 1kHz = 0.018%

Output = 548 mV RMS - Power = 3.2mW

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Usually i would expect to see the output voltage rise proportionately with output resistance. This doesn't happen with this circuit, it stays constant, why is that ?

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Circuit B no global feedback

Load = 1 Ohm

Input = 80V RMS @ 1kHz

Distortion @ 1kHz = 2.4%

Output = 8V RMS - Power = 176W

*

Load = 10 Ohm

Input = 80V RMS @ 1kHz

Distortion @ 1kHz = 1.7%

Output = 8.32V RMS - Power = 19.33W

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Load = 100 Ohm

Input = 80V RMS @ 1kHz

Distortion @ 1kHz = 1.79%

Output = 8.36V RMS - Power = 1.95W

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I wasn't expecting to be able to drive the OpAmps at such a very high level :eek: I just kept upping the Volts to see where the distortion jumped right up. I did rise as i presumed it would, but nowhere near what i thought it might ? I managed to get it up to 100V before clipping was visable !

Why are the OpAmps "seemingly" able to take so much drive level ?

Can you see Any room for improvement in either of these designs, and where/how ?

TIA

jxdking 8th April 2013 12:31 AM

I am afraid, in first diagram, these 2 OP will fight with each other. Under the same condition of input, the 2 OPs might not output the same voltage.

DUG 8th April 2013 12:36 AM

Global Feedback:

You have two amps controlling DC output level.
Which one is going to be happy and which one is going to want an argument?
Thermal stability

The voltage gain is dependent on the feedback ration, not load.

No Global Feedback:

Thermal stability...vs crossover distortion.

Why the 1K / 1nF delay in the FET drive. Is this going to be stable?

Why the 1K / bias network attenuator in the FET drive. Is any signal going to get to the Gates...This might explain the low output for large input.

What simulation program allows 70V+ signal beyond rails into an opamp with only 1.79% distortion?

Reality check says something is wrong here.

JMFahey 8th April 2013 03:19 AM

No comment.

(Which already *is* a comment) :eek:

RNMarsh 8th April 2013 04:37 PM

look at dc levels on each opamp output.
They are not powered via a + and a - supply

Thx-RNMarsh

Zero D 8th April 2013 07:21 PM

I appreciate the replies, All are helpful :)

The reason for doing this was, just to see what "might" be accomplished by experimenting with unusual circuits. And at the same time not using lots of components. Sometimes not knowing everything, or as much as others, can lead to discoveries etc by not following convention ! Many things in the past have been discovered this way ;)

I originally included the 1nF Caps as they appeared to reduce distortion slightly !

The 1k gate resistors were a starting point, as sometimes lower values "can" cause problems.

I'm not sure why i was able to drive one of the designs with such a high level originally ?

*

Now with no 1nf caps, & 100 Ohm gate resistors, & symetrical + - 17V supplies to the whole circuit.
_

Circuit A

Load 10 Ohms * Input = 775mV * Output 30mW * 0.015% Distortion * -122uV DC output Offset. Not too bad really i think, for what is anyway ;)

Circuit B

Not good :o

Regards

Zero D 9th April 2013 03:09 PM

Some further observations on Circuit A

Interestingly, when i used only 1 OpAmp the distortion increased to well over twice what it was before. So using 2 OpAmps in this configuration "seems" to make a significant difference ! Why this should be though ?

Distortion remains almost constant @ around 0.015% between 20Hz - 20kHz.

Also the fr looks fine to over & above 100kHz @ 775mV !


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