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Old 8th February 2013, 10:15 PM   #1
danny92 is offline danny92  Portugal
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Default Nyquist stability

Hello everyone,
I'm designing a solid state power amplifier, and I'm adjusting the dominant pole capacitor at the VA stage. The problem is the phase shift that is near 180 degrees (175 degrees actually) at the output with 0dB voltage gain, could the amplifier meet the Barkhausen criterion and start self sustaining oscillations?
What I've to do to prevent this from happen?
Bode diagram attached,
Best regards,
Daniel Almeida
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File Type: jpg tinadiag.jpg (58.3 KB, 96 views)
File Type: bmp 0 dB phase shift.bmp (81.4 KB, 9 views)

Last edited by danny92; 8th February 2013 at 10:20 PM.
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Old 8th February 2013, 10:19 PM   #2
danny92 is offline danny92  Portugal
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Attached is the Nyquist plot.
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File Type: jpg np1.jpg (26.3 KB, 93 views)
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Old 9th February 2013, 12:14 AM   #3
danny92 is offline danny92  Portugal
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Default Reducing Qvbe bias resistor value

Hello everyone,
I've reduced the Qvbe bias resistor values and the phase shift is now between 150 and 160 at 0 dB (I think that those are acceptable values).
If I use a small capacitor between 30 and 50 pF, I've some kind of voltage gain "peak", I've simulated the progress of the output voltage at that frequency, and I've got a distorted signal but no positive feedback or oscillation.
When I use capacitors between 300-500 pF I've got terrible THD+N characteristics at 20kHz, and the 1kHz THD+N characteristics gets worse but the peaks disappear, why is this happening?
What's the best option?
Thank you very much for your concern,
Best regards,
Daniel Almeida
Attached Images
File Type: png 0 dB phase shift_2.png (20.0 KB, 81 views)
File Type: png 0 dB phase shift_3.png (19.1 KB, 80 views)
File Type: png gain_peak.png (39.8 KB, 80 views)
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Old 9th February 2013, 12:26 AM   #4
danny92 is offline danny92  Portugal
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Hello everyone,
I've made this graphic using LM4702C (with the circuit similar to the one found in app note snaa045) to drive IRFP240/IRFP9240 and the result is similar, a gain "peak" is present, maybe the problem are the output devices?
Or TINA TI simulator?

Thank you very much for your attention,
Best regards,
Daniel Almeida
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File Type: png lm4702_gain_peak.png (11.9 KB, 16 views)
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Old 9th February 2013, 12:28 AM   #5
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Maybe a .TRAN analysis would give you additional insight into the circuit behavior?

If version_1 of the amplifier has gain-peaking in the AC analysis, but version_2 of the amplifier has no peaking, perhaps it would be revealing to simulate driving each of these amplifiers with a 1 volt peak-to-peak ideal square wave input (-0.5V to +0.5V), then look at the .TRANsient output.
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Old 9th February 2013, 12:46 AM   #6
danny92 is offline danny92  Portugal
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Thank you very much for your fast reply
I've simulated both with sines at the frequency of the highest peaks and the wave becames distorted but with the same amplitude.
Maybe the problem could be the output pairs used?
PS: LM4702C TI amplifier also has gain "peaking", and I think that's strage.
In audio range the amplifier is linear and the sine waves are almost pure.
Best Regards,
Daniel Almeida

Last edited by danny92; 9th February 2013 at 12:49 AM.
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Old 9th February 2013, 01:00 AM   #7
djoffe is offline djoffe  United States
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did I miss it? Is there a schematic posted?
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Old 9th February 2013, 01:43 AM   #8
danny92 is offline danny92  Portugal
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Hello evreryone,
Attached is the schematic of the circuit I'm testing.
This is a mirror image amplifier, with push-pull VA stage (current limited) and cascode loading, the constant current sources of the differential amplifiers are feedback current sources, the amplifier as two single pole compensation capacitors, the output stage consists of a vbe multiplier for output devices biasing, and also as short circuit protection and against inductive loads (with clamping zener diodes), the MOSFETs have gate stopper resistors to prevent high frequency oscillations, I've a resistor from sink to ground to reduce 2nd harmonic. The output stage consist of two vertical MOSFETs IRFP240 N-channel and IRFP9240 P-channel, the amplifier has a gain of aprox. 30 V/V for AC and 1 V/V for DC, the input is AC coupled, this amplifier also includes a Boucherot Cell (Zobel Network) to filter high frequency oscillations.
Thank you very much for your help,
Best regards,
Daniel Almeida
Attached Images
File Type: png amp_design1.png (36.1 KB, 47 views)
File Type: png output_stage.png (39.1 KB, 49 views)
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Old 9th February 2013, 02:06 AM   #9
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Hi Daniel
This architecture looks attractive but has problems.
They have been discussed extensively - search for "Heeeelllppp"
The schematic in little pieces does not help, or at least it doesn't help me.
It is a creative way to achieve modularity but perhaps it would be easier for others if you presented your circuit more conventionally.

Best wishes
David

Last edited by Dave Zan; 9th February 2013 at 02:19 AM.
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Old 9th February 2013, 02:07 AM   #10
djoffe is offline djoffe  United States
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The current in your VAS stages will be pretty well indeterminate, or limited by your current limit circuits in the cascode path, neither of which you really want to happen.

You have two dueling high gain points, and even if you've made the simulator happy, real life won't be very kind.

Perhaps as an experiment, you could replace one of the VAS's by a constant current source...I know this won't preserve the mirror image characteristics, but as it is, I don't think it will behave well.

Once that's sorted out, the next issue is that the typical simulator mosfet models are awfully crude, and typically not very trustworthy. Perhaps yours are better than most.
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