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aco 24th January 2013 02:45 PM

Simple amp
 
3 Attachment(s)
Hello,
I'm rather new to the amplifier world and I thought it'd be wise to present this circuit here, which is a design I've composed from bits and pieces scattered around the internet. I understand most of the stuff going on as my background is electronics technician, but it's been more than 10 years since I had anything to do with audio, which were a project we did back in school.

As said I've put this together from a lot of inspirational sources, for instance the VGS bias circuit originally only consisted of a potentiometer which made the quiescent current of the main power mosfets fly around like a mad onion in a thunderstorm when sweeping the temperature.
The OCP circuit was nicked from another design as well and seemed fairly idiot proof.
I've also added some clamping to the mosfet gates, I'm not really sure if it's necessary but it's of no harm.

I've simulated the hell out of the circuit, but I am a bit on unfamiliar ground as to simulating amplifiers, I've been trying to do all these mandatory THD plots, both with .four and with some nice add-on I found for spice - everything seems to be working nicely over a resonable temperature range.

So the reason I'm posting this is to get some feedback from the pros because I know that I can easily have missed "that circuit" or "that simulation" - Because this is my first project of this kind, and because I've spent a lot of time on it and nearly have the PCB layout done, I am pretty determined to stick with this design unless someone says "that design is notoriously known to open the gates of hell".


The powersupply is just a mockup in the simulation, just to get some more realistic picture of how it'd behave, I haven't decided on actual values or components for that yet.

The DC protection will most likely not be on the same PCB as the PA but rather on some output board.

So if you guys have any suggestions, things you'd recommend me to examine, simulate, additions etc. please let me know!

I've attached the LTspice file for anyone wanting to play around with the design, and also a picture of the layout, please note that the names of the components are not the same.

Thank you for your interest and help!

Mooly 24th January 2013 03:00 PM

One suggestion would be to add a preset rather than using two diodes for a fixed bias. It doesn't need be temperature compensated for laterals.
Its not a million miles away from the old Hitachi application notes designs from way back. It should sound good.

Haven't looked at your files yet... maybe later :)

AndrewT 24th January 2013 03:06 PM

R23 seems to be far too high.
What about 220r?
But then R8 becomes too high.
D1 & 2 can be replaced with a variable resistor.

Have a second look at R3 value.
Add Zener protection for the gates.
Add RF attenuation.
Re-look at C1:C2 ratio.

aco 24th January 2013 03:07 PM

1 Attachment(s)
Hi Mooly,
Oops, I forgot to attach the schematic as a file viewable for others than LTspice users - the picture you commented on is the original one which very correctly just biases with two diodes, as you see in the attached I replaced those with a somewat thermally compensated solution :)

Mooly 24th January 2013 03:09 PM

Just quickly opened your file... its not complete by any means and I get a message about unknown models for HEXFET devices rather than laterals. This amp won't work with the IRF type devices, they must be laterals.

aco 24th January 2013 03:10 PM

I just posted the schematic as it is now, I'm sorry that the values (upper left corner) might be a bit hard to read, please let me know if it's too hard.

Mooly 24th January 2013 03:14 PM

OK... so it looks like your changing the whole design around to try and use HEXFET's :)

aco 24th January 2013 03:22 PM

Quote:

Originally Posted by Mooly (Post 3340215)
OK... so it looks like your changing the whole design around to try and use HEXFET's :)

Exactly :)

aco 24th January 2013 03:31 PM

updated files
 
2 Attachment(s)
Hi guys,
I just updated the schematic, added the clamping on the gates and changed the decoupling capacitor in the FB to the same value as the input one (c2 and c3).

aco 24th January 2013 03:36 PM

Quote:

Originally Posted by AndrewT (Post 3340204)
R23 seems to be far too high.
What about 220r?
But then R8 becomes too high.
D1 & 2 can be replaced with a variable resistor.

Have a second look at R3 value.
Add Zener protection for the gates.
Add RF attenuation.
Re-look at C1:C2 ratio.

Hi AndrewT,

I'm sorry for the confusion, please find the updated schematic and ltspice file in the last post, I took your advice regarding the capacitor ratios, I can see the sense in that :)


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