How well does noise measurement in spice match real world?

Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.
Usually, the accuracy of noise simulations in any simulation programme depends strongly on the accuracy of the model parameter sets. For example, I've seen libraries with parameters for hundreds of discrete bipolar transistors where each transistor's base resistance was set to 10 ohm; I wouldn't trust simulation results from such libraries any further than I could throw them. FET model parameter sets often don't include gate series resistance, which can be a major noise source in big, high transconductance JFET's.

Besides, MOSFET and JFET models often give totally wrong results when the FET's are biased in the triode region (low VDS). For physical reasons, the noise coming out of the channel of a FET biased at VDS=0 should be the thermal noise of the channel resistance. With simple FET models, the noise often becomes zero...
 
If you intend to use MOSFET's or JFET's as switches, at VDS=0, you can simply do a noise simulation with the switched-on MOSFET's or JFET's replaced with their on resistances.

By the way, all practical resistors generate 1/f noise to some extent when the voltage across them is not zero. This is not modelled in an ideal PSpice resistor. In fact, as far as I remember, I've never seen a resistor model including 1/f noise in any circuit simulator. So it is wise to use metal film resistors for all critical parts of the circuit, as these are known to have little 1/f noise.

(With zero voltage, all resistors generate white thermal noise only.)
 
Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.