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Old 29th December 2012, 12:09 PM   #131
Elvee is offline Elvee  Belgium
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Quote:
Originally Posted by Edmond Stuart View Post
Hi Elvee,

Of course the two curves are just the same, simply because this is an ordinary class-AB OPS without sliding bias.
Then I think your results are perfectly normal: you sort of expect f(x+y) to be equal to f(x)+f(y), which is not generally true if f is a non-linear function.

To measure independently the transconductances of each half under those conditions, you could add another stimulus source, independent of the excitation(s) (signal and sliding bias), and use it to measure the resistances or output conductances of each half, or both together.
By plotting these values against the excitation, you would get a consistent picture.
You could place a current or voltage source in the output for example.
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Old 29th December 2012, 01:15 PM   #132
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>... you sort of expect f(x+y) to be equal to f(x)+f(y), which is not generally true if f is a non-linear function.

If that was the reason, then we shouldn't get equal result with a fixed bias, because also in this case we have to do with two nonlinear functions.
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Old 29th December 2012, 03:37 PM   #133
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Originally Posted by Edmond Stuart View Post
If that was the reason, then we shouldn't get equal result with a fixed bias, because also in this case we have to do with two nonlinear functions.
No, because they don't interact with each other, and because the quantities analyzed are not identical: the dV(C,out) includes half of the sliding bias which is correlated to the signal, which dV(A or C, out) doesn't.
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Old 29th December 2012, 04:07 PM   #134
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Here is more or less what I suggest to disentangle unwanted correlations.

It is very clumsily made, and the output format is highly inconvenient, but I am sure someone more versed than I am in spice could do it in an elegant manner and produce a nice and clean graph. This is just to show the principle.

Basically, the original stimulus is swept through a range of values (with a sliding bias, V4 has to follow), and the output conductance is measured using a different source, in this case AC analysis because I found it the simplest method.
You can plot the global transconductance and that of each half, I am sure you will find consistent results (ie global transconductance= sum of each half)
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Old 1st January 2013, 02:20 PM   #135
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Default Center point C

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Originally Posted by Elvee View Post
No, because they don't interact with each other, and because the quantities analyzed are not identical: the dV(C,out) includes half of the sliding bias which is correlated to the signal, which dV(A or C, out) doesn't.
Hi Elvee,

First, a Happy New Year,

>the sliding bias which is correlated to the signal
That's what it's all about. In post #118 I asked: tell me what I did wrong? Of course I really did already know what was wrong about it. But I felt it important that someone else figured it out. And why was that? Because a few DIYers think that gm modulation is the principle cause of distortion. Well, it's not, instead, it is the variable bias voltage that causes the distortion, which becomes clear if you take point A, B or C as input. Gm variation is just a 'synthetic byproduct' derived from bias variation. Admittedly, it also correlates with the amount of distortion, but it isn't the real cause. And why is that so important? Not just because it doesn't harm to know what's really going on, but also you must made a decision which point (A, B, C) should be used as (effective) input, or in the example below, which connection should be chosen as take off point for the Miller compensation. The schematic is from Bob Cordell's 'Designing Audio Power Amplifiers' page 547 and he did it in the right way: point C in order to minimize the effect of nonlinear bias modulation.

Cheers,
E.
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Old 1st January 2013, 04:25 PM   #136
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Merry Xmas Edmond!
How is your distortion analyzer coming on my the way?
/OT
Hi Andrew,

Firstly, A Happy New Year.
As for the distortion analyzer, thanks to a (rather obscure) article I found on the web: http://evergreen.loyola.edu/mpknapp/...s/knapp-sv.pdf I made some progress.
With the help of this article I can exactly compute things like amplitude, offset, phase and frequency. But more importantly, this article enables me to find the solutions in an analytic way, thus not via a tedious trial-and-error approach.

Cheers,
E.
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Old 1st January 2013, 05:22 PM   #137
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Quote:
Originally Posted by Edmond Stuart View Post
Hi Elvee,

First, a Happy New Year,
Thanks Edmond, the same to you.

Quote:
That's what it's all about. In post #118 I asked: tell me what I did wrong? Of course I really did already know what was wrong about it. But I felt it important that someone else figured it out. And why was that? Because a few DIYers think that gm modulation is the principle cause of distortion. Well, it's not, instead, it is the variable bias voltage that causes the distortion, which becomes clear if you take point A, B or C as input. Gm variation is just a 'synthetic byproduct' derived from bias variation.
I think we have to be extremely careful, and things could well be even more subtle than that.
We have to distinguish "real effects" from artifacts caused by the way we use the simulators. When you hack the OPS in two parts, analyze them separately then add the two results as a sanity check, and see anomalies appear, it doesn't mean the anomalies are real, simply that you performed some illegal operation in this context.

Quote:
Admittedly, it also correlates with the amount of distortion, but it isn't the real cause. And why is that so important? Not just because it doesn't harm to know what's really going on, but also you must made a decision which point (A, B, C) should be used as (effective) input, or in the example below, which connection should be chosen as take off point for the Miller compensation. The schematic is from Bob Cordell's 'Designing Audio Power Amplifiers' page 547 and he did it in the right way: point C in order to minimize the effect of nonlinear bias modulation.
I think point C is misplaced in this schematic.
Anyway, we have to deal with three separate effects: the artifacts caused by an improper use of simulation, the first order injection of the sliding bias into the "noble path", and the parametric effect of the sliding bias on the signal path.
We have more or less dealt with the first point.

The second point is what I call an imperfect orthogonality between the noble and control paths.
In the example of the simple OPS, this effect can be minimized by making the sliding bias symmetrical about the drive voltage (what should be C), and making the OPS as symmetrical as possible.
This should eliminate most of the "leaks" of the control into the noble signal.

And then we have the modulation effects: with the sliding bias algorithm you have used, its effect is to render the OPS "perfect", simulating an ideal pair of transistors without emitter resistors, internal or external (but without the risks associated with such a configuration).
However, this predictably increases distortion compared to an optimal combination of emitter resistors and bias current, because of the purely exponential characteristic.
When a suitable resistor is added, it provides a break-point grossly approximating a square law characteristic.
To actually reduce distortion compared to this practical optimum, one would need to generate a law more complex than In*Ip=constant
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Old 2nd January 2013, 12:19 PM   #138
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Originally Posted by Elvee View Post

I think point C is misplaced in this schematic.
I should probably clarify what I mean: node C is suitable for analyzing the behavior of the output compact (and application of the compensation), but it is not on the same level as A and and B, and cannot be used for comparison purposes (not directly anyway).
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Old 2nd January 2013, 01:23 PM   #139
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Quote:
Originally Posted by Elvee View Post
We have to distinguish "real effects" from artifacts caused by the way we use the simulators. When you hack the OPS in two parts, analyze them separately then add the two results as a sanity check, and see anomalies appear, it doesn't mean the anomalies are real, simply that you performed some illegal operation in this context.
BINGO! I couldn't put it better.
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Old 3rd January 2013, 09:45 AM   #140
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Default pointless point

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Originally Posted by Elvee View Post
I should probably clarify what I mean: node C is suitable for analyzing the behavior of the output compact (and application of the compensation), but it is not on the same level as A and and B, and cannot be used for comparison purposes (not directly anyway).
If A or B were on the same level, a comparison would be pointless.
So, what's your point?
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