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28th December 2012, 05:08 PM  #121  
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Quote:
Otherwise, just stay in your simulation world. It may look like you are always right (in particular when not being specific on all the details, like schematics, models, methods, etc...), and also reading on a topic (I already suggested some good references) is not required. I think it's time to update again your **** list. 

28th December 2012, 06:04 PM  #122  
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Quote:
But more generally, if a gm remains constant for a range of currents, this implies that the element is linear for that range Quote:
Quote:
For an ideal transistor pair having no Re, internal or external, a nonlinearity will already be present: for the pair to remain linear, the sum of the collector currents would need to remain constant, but that is never the case, even in the "class A region". With a constant base bias, instead of a constant sum of Ic's, we have a constant sum of the logarithm of the currents. For small excursions around the quiescent state, this is more or less equivalent, but as soon as one current becomes large, discrepancies occur. Let us take a numerical example: if the bias voltage is such that it establishes an Iq of 100mA, an output current causing a shift (bias modulation if you like) of 20mV will ~double the current in one of the transistor, resulting in Ic=200mA, and it will halve the current in the other one, but that is not enough: to keep the sum constant, it would need to be 0. We therefore have a 50mA excess, and a corresponding increase in the transconductance. In this case, the gm is minimal at the equilibrium, and increases proportionally to the excursion. If emitter resistors are added, this effect can be mitigated and even reversed, but they will not make the OPS linear: with devices obeying an exponential law, that is an impossibility. Only square law devices could achieve that Quote:
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28th December 2012, 06:05 PM  #123 
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Walter, your reference, this one: http://users.ece.gatech.edu/mleach/papers/classab.pdf doesn't cover the topic we are discussing here. So if you think it's relevant then you are missing the point completely.
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28th December 2012, 06:52 PM  #124 
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Elvee, I know this already, but it's beside my point. Moreover, my simulator takes care of all these matters.
I'm talking about the difference between the 'green' and the 'black' incremental gm (see post #118). The first one is simply gm = delta Io / delta ( Vi  Vo ), where Vi = ( Vb1 + Vb2 )/2 and Vb1 and Vb2 are the base voltages of the top respectively bottom output tranny. Notice that ( Vb1 + Vb2 )/2 = Vb2 + Vbias/2 = Vb1  Vbias/2. IOW, the bias voltage has been taken into account. While the second one consists two gm's (of top resp. bottom tranny) summed together: gm = delta Ie1 / ( delta( Vb1  Vo ) + delta Ie2 / delta( Vo  Vb1 ) ), were Ie1 and Ie1 are the emitter currents of top respectively bottom output tranny In this case the bias voltage has not been taken into account. Not surprisingly, we get two different gm figures. Now, which of the two is correct, the green one or the black one? Cheers, E. PS1: Vb1 and Vb1 are base voltages WRT ground, thus not Vbe. PS2: Walter, you are not supposed to comment on this post. PS3: I corrected the equation for the black gm.
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Een volk dat voor tirannen zwicht, zal meer dan lijf en goed verliezen dan dooft het licht…(H.M. van Randwijk) Last edited by Edmond Stuart; 28th December 2012 at 07:22 PM. 
28th December 2012, 07:56 PM  #125 
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Could you post the schematic with nodes a, b, c and resistors R8, R9, R10 explicitly shown?
Seeing things graphically helps lift ambiguities
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28th December 2012, 08:52 PM  #126 
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Okay, here it is:
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29th December 2012, 07:48 AM  #127 
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As pointed out in the EDN article, the class I schematic is the same as fig 4 of USPTO 4,595,883 from 1986 (Pioneer). It does simulate well on Simetrix

29th December 2012, 09:30 AM  #128 
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I don't get the same anomaly: the two curves are perfectly overlaid.
I see two possibilities: your V(A) varies with respect to V(B): the two expressions are equivalent provided dV(A,B)=0 Another possibility is an ambiguity in the sign convention in the simulator resulting in quantities subtracting instead of adding under certain conditions.
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29th December 2012, 11:15 AM  #129 
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If youre interested in applying it just buy pioneer PA0016 Ic which is available at around 15 euros. It will save you some complexity.

29th December 2012, 11:52 AM  #130  
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Quote:
Of course the two curves are just the same, simply because this is an ordinary classAB OPS without sliding bias. If you are in the mood, you could repeat the sim with sliding bias. To keep it simple, just replace V4, by a CCVS that keeps I(R8)*I(R9) constant. For an idle bias of 100mA for example, set the product at 0.01. Of course such circuit is not exactly the same as a PA0016, though it comes close as far as bias concerns. Here's an example with mosfets and a CCCS that keeps product of source currents constant: CDCP Cheers, E.
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