Help Needed: Excessive DC Offset/Imbalance - Rotel RB-990BX Power Amp

[dtm1962]

Originally Posted by jitter

Way to go! But I agree with you that maybe the repair is not entirely finished yet, 80 mV is not good enough, especially in light of the good channel's <10 mV.
I wonder what had caused the offset in the first place. Seems that we were mostly chasing a bad replacement part in this thread, that may have diverted our attention from the original cause a bit.

A few questions I have for putting together the puzzle:
Did you keep al failed and/or replaced components? If so, can you mark in the schematic which components failed (and how, i.e. failed open or short)?
Can you do comparative measurements again between the channels?

Hi Jitter:

I believe the "problem" (not really a big issue) is the matching as I notice thet the PNP's (1016's) were matched within 1% (hfe=234/235) and the NPN's were 15% different (236/273).

So I hope Mooly can simulate using his simulatation software.

I will add another post to Mooly's posting

[dtm1962]

Originally Posted by Mooly

That's brilliant

Now this 'ere offset. You haven't a fault, just an imbalance due to non matched input devices. It will never be a problem and will never cause a problem.

So that said, how do we improve on it if we want to. Well I notice that Q615 and Q611 are the same type. So next question... can we use these ? And you have two more in the other channel. So you see where this is going

It is only the balance between each of the input stage NPN's or PNP's that matter. You don't have to match NPN and PNP which is impossible anyway despite what you hear about "matched pairs". So if Q615 and the one in the other channel are the same and also Q611 and its opposite number then we have a solution

So as indicated in Jitter's posting.... I believe the "problem" (not really a big issue) is the matching as I notice thet the PNP's (1016's) were matched within 1% (hfe=234/235) - Q601 & Q603 respectively. The NPN's were 15% different (273/236) - Q607 & Q609 respectively.

Now I am using differential input PNP's that have a gain of 305 (Q601) & 306 (Q603) & the NPN's are 298 (Q607) & 285 (Q609). I believe I have a NPN that has a gain of ~320-350 that I could substitute to emulate the +15% bias in gain that Q607 has over Q609.

Mooly: Could you simulate an imbalance such as indicated above to see if this swings the +80mV closer to 0mV?
Maybe this design has a natural +bias that Rotel has compensated for by adding an imbalance in the Diff Pair (NPN's) to counter this.. Just a thought.

Or am I misunderstanding this and the 3 transistors (that have a hfe of ` 235 +/-0.5% ) are good and the oddball NPN has gone out of alignment (hfe=273) which would be difficult to see as I believe gain would usually go down (?)

Any commnets?

Let me know.

Thanks in advance,

[Mooly]

I'll post some simulation results in few minutes (hopefully) to illustrate the point.

The gain of the transistors as measured on a DVM may not be the whole story. They may well be selected for a match at a given collector current for example. Taking different devices from different batches (even if the hfe is identical), well they may still have tiny differences too...

Also the gain you measure will depend greatly on temperature. Hold the device in your fingers and it will go up. Even if some devices have a gain of say 100 and some 300, they are all still "good". Also the characteristics won't change with age or use.

I'll try something to illustrate hopefully.

[sakis]

this is getting way too long i am not in the thing to follow it properly but i will bet you that the offset is not coming from miss matching ...

I bet you its a minor damage mostly resistor or capacitor with a drifted value ...even better a tiny small leak on some transistor ...

Kind regards
sakis

[Mooly]

Well simulating with different devices just gives a low offset as expected. Change any input device and the offset alters.

Here the C version is the same transistor but a different model (done by Bob Cordell).

I think the best you can aim for is to match the PNP and NPN pairs as best as possible and then try swapping each pair over one at a time.

If you felt confident you could swap the devices from the other channel to this one and see if the offset is lower.

[wahab]

Assuming the circuit works correctly the remaining output DC offset
is mostly influenced by the input stage caracteristics.

What matters is that the differential transistors are VBE matched by pairs,
it s less important that the NPN pair is matched with the PNP pair.

[Mooly]

Originally Posted by wahab

Assuming the circuit works correctly the remaining output DC offset
is mostly influenced by the input stage caracteristics.

What matters is that the differential transistors are VBE matched by pairs,
it s less important that the NPN pair is matched with the PNP pair.

Yes, I would agree with that.

And I think that is is why just checking hfe on a DVM isn't the whole story. It gets it close but not close enough. Given enough devices you should be able to "mix and match" and get it fairly low without having to modify anything (which I wouldn't recommend really).

[jitter]

If swapping over the critical transistors from the good channel cures the problem, then I guess you're right, but until then, I have a tendency to agree with sakis.

[wahab]

Originally Posted by Mooly

Yes, I would agree with that.

And I think that is is why just checking hfe on a DVM isn't the whole story. It gets it close but not close enough. Given enough devices you should be able to "mix and match" and get it fairly low without having to modify anything (which I wouldn't recommend really).

Of course the components quality matters given the high voltage
and that leakages can be substancial but even then this design
is flawed from the start and you are left chasing ghosts...

The inputs biaising resistors are of different values and this will
unbalance the input stages voltages since at a biaising current
of 10uA the mismatch in dc inputs voltage will be as much as
100mV for 10K difference in the said resistors leading to
output DC voltages of the same order...

So the bias not only become Vbe dependant but also largely
Hfe dependant , hence you are left with finding input transistors
that are accurately...mismatched !!!...

All in all , quite a nightmare...

[Mooly]

Originally Posted by wahab

The inputs biaising resistors are of different values and this will
unbalance the input stages voltages since at a biaising current
of 10uA the mismatch in dc inputs voltage will be as much as
100mV for 10K difference in the said resistors leading to
output DC voltages of the same order...

That would be a logical assumption but it doesn't seem to work like that for this type of configuration. Different input bias current don't seem to alter the offset. I tried 10k and 100k (now thats unbalanced) yet the offset is still in single mv figures. It does seem to purely rely on the matching of the semiconductors.