help with mosfet power amp output impedance calculation

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Hi there,

Am messing about with the F6 concept amp but have a more fundamental question that I haven't been able to understand - how does one solve for the output impedance for a common source power fet output stage? Take the example below - wikipedia says that the output impedance = RL but it most certainly is not (in quasi complementary, llquam found 44R open loop, I found similar). The online references I can find jump into small signal analysis and I get lost pretty quickly :(

Can anyone suggest where I might look or an equation to try and get close to what is measured empirically ? Assume Gm approx 8S ...

many thanks in advance! Cheers,
 

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Measuring it should not be too difficult.... I use this method:

Measure voltage across a dummy load, lets assume this is V1 and the load resistance is R1.
Change the dummy load to a lower value and measure the voltage across the load and resistance of the load, lets assume this is now V2 and R2.


Output impedance = [(V2/R2) - (V1/R1)] / (V1-V2)

Needless to say, we leave the input voltage of the signal to the amp untouched so that they are the same for both measurements. I think the standard is to measure it with a sinewave signal of 50Hz or 1Khz but I'm not sure about this point... perhaps the more experienced on the list will be able to tell.

My problem is correlating the measurement to a computed estimate, i can't figure out how to calc an even remotely close estimate to what I measure.....
 
but under what conditions do the measurements hold true?

If the ampliifier sees a different drain load then the amplifier will behave differently.

eg, Drain load = 2k and output load = 100k. the transistor sees the total load as 1k96
You can now find the amlpifying abilities of the transistor.

Change the output load to 200k and to 50k and you will find that the transistor behaves as much the same as an amplifier.

Now attach an output load of 1k.
You have completely changed what the transistor sees as a drain load.
 
So for load of 4ohms or 8ohms one would expect the Drain load to be less than 10% of external load, so that you don't ruin the amplifying ability of the transistor.
But you can't use a Drain load of 0r4 nor 0r8 in common Source mode.

Do you see why the apparent output impedance is being measured wrongly? You are attaching an external load that ruins the transistors ability to amplify.

You must add a buffer between your 4ohms or 8ohms external load and the Drain load, to allow the amplifier to work properly.
 
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