Optimizing the VBE Multiplier

1. Bob Coredell says that you can determine the current compenstaion resistor of the VBE multipler by multiplying the intrinsic base-collector resistance of 2.9 ohms by the multiplication factor, which gives you the dynamic impedance. You then pick a resistor of the same value to compenstate. So if my mulitplication factor is 6, I would use an 18 ohm resistor.


Douglas self uses an 18 ohm resistor in one of his amps with only a mutiplication factor of 3, which should dicate a 10 ohm resistor. He also recommends attaching a variac to the amp then changing the resistance until you get the least variation in current over voltage changes. This is difficult to do.

What I glean from this is that the higher the mulptiplication factor the more the circuit would benefit from a current compensation resistor. So is there any easy way to determine the value?


2. I have read in the web to put a capacitor across the VBE mutiplier output to stabalize it, particularly from high frequencies. I have seen advice on the value and type of capacitor so varied that there is no rule of thumb here.

My VBE muliplier drives a predriver, that drives a driver transitor that drives 12 output transistors. Does the fact that the prediriver is an easier load on the VBE mutiplier mean I can get away with a smaller cap. I propose to use a small 1 uf polyprop cap, but then others say use larger electrolytic caps here, life Self and Cordell. Is there any science here at all or just opinions?
 
I'm surprised no one responded to this.

I don't know what this "intrinsic base-collector resistance" is. I think it has very little to do with Vbe multiplier regulation. Diode ( = transistor) resistance is inversely proportional to forward current. The proportion is .033. So, to calculate the resistance of a diode, solve .033/If. The same is true for a transistor connected like a diode.

Say we have a transistor with 6mA Ic. If we short the base and collector, the transistor will show a small-signal AC resistance of 5.5R. The compensation resistor is inserted in series with the collector, and the output taken from between the collector and resistor. If the resistor equals the dynamic resistance, it will cancel Vf variations caused by Ic changes.

However since the resistor has constant resistance and the transistor's resistance is dynamic, they only cancel at the given Ic. The dynamic mismatch is such that if Ic goes over or under the nominal value, the voltage drop decreases. This works to our advantage for a Vbe multiplier, since in both fault conditions output stage bias will decrease rather than increase.

For a Vbe multiplier, the resistive divider affects things. It is basically true that the Vbe multiplying factor also multiplies the dynamic resistance. So for a x2 Vbe multiplier at 6mA, the compensation resistor is roughly 11R.

However transistors commonly used for the Vbe multiplier typically have low Hfe of 100 or so. This has to be accounted for. The source impedance seen by the transistor base is divided by Hfe. So say we have a x2 multiplier at 6mA with Hfe=100 and 2 1K resistors as the voltage divider. The total divider resistance seen by the base is 500R. 500R/100Hfe=5R. This alters our compensation resistor significantly, from 11R to 16R.

The .033 proportion can change between transistors and diodes as a result of doping differences. I'm not sure but I think .033 is usually right for small-signal silicon transistors. Schottkey diodes are more like .045.

Theoretically, if we replace the compensation resistor with a diode, the dynamic resistances would track and null perfectly. Unfortunately this cancels the voltage drop we need as well as forcing the transistor into Vcesat, so it won't track right. Furthermore any significant current draw from the output node disrupts tracking. If there is a schottkey diode with the same dynamic resistance factor as a silicon transistor, then we could use that and have a voltage drop of .3V. We would have to use something like the BC5xx or BC3x7 so Vcesat would not be an issue. Simulation models suggest some schottkeys will actually work for this, but I don't know whether to trust them. In any case using schottkeys this way you'd need to double your multiplier in order to have the same voltage drop. You would need as many schottkeys as your multiplier. This idea needs to be proven

The Vbe multiplier bypass cap is a subject of mostly opinion and individual experiences. It is important to realize this cap is a big piece of surface area connected to the VAS, and radiates to nearby circuitry. So the size and dimensions of the cap used here may alter stability, and this may be just as audible as any effect on bias voltage. I suspect this may account for some of the variability of the chosen cap. If you want to eliminate this mechanism, you can use a strip of grounded foil around the cap to short its static radiation to ground. Or several turns of a grounded wire may be enough.

As far as science and ruggedness, if significant current will be drawn through the Vbe multipler, which is the case for a double EF output stage, a Vbe multiplier bypass of up to several hundred uF is justified. For a triple EF or otherwise heavily buffered output stage, the possibility if dynamic bias pumping is diminished. In this case small RF decoupling is still justified, because a Vbe multipler can be slow and present a significant impedance at RF and this can cause stability quirks. For this purpose I think no more than 10nF is required, and 1nF is likely to pass with flying colors.

If we were to attempt to consider the cap audiometrically, we would be thinking about the RC time constant between it and the Vbe multiplier resistance. At a resistance of 16R, it's unlikely a cap here will be large enough to have a corner in the audio band. Even so I've heard changes in the sound when changing this cap so it's something I'd try at least once.
 
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Hi Guys

Self also showed that adding one more BJT in CFP fashion provides a much lower output impedance than the compensated single-BJT can (fig.15-34, in Audio Power Amplifier Design Handbook 5th ed). This is really the way to go. The BJT used for thermal tracking can be a large case to accommodate mounting to drivers or outputs, with the other just a high-gain TO92.

The Vbe bypass cap can be left out and most circuits will function fine. However, for best high frequency response 100nF to 10uF is typically added.

Have fun
Kevin O'Connor
 
A CFP will mostly get rid of this problem, but has its own complex behavior. It can go unstable, which is seriously bad. And tempco may be off. Ultimately one needs to determine what kind of bias generator to use based on the tempco requirements, as this will limit the topology to the compatible types.
 
Thanks for the link to the PDF but the comparison there does not look square.
The Vbe multiplier circuit (2b) has lower base-emitter resistor than 2c and 2d and starts to drop out at the lower current levels of the chart.
Also there is no comparison of a Vbe multiplier + resistor with the proposed "improved" circuit (2d).
If a resistor is used for current correction then I am not sure the extra diode-connected transistor offers much improvement.

Best wishes
David
 
I used the version with one transition and a diode, mounting only the one transistor against the body of the output device package. I believe the Vbe does better when it's not mounted on a large heatsink - too much thermal lag, better to be mounted on the power device itself.
Dear bigun, how to calculate 47r on your TGM5 hagerman Vbe?
if i use, say bd139 is still 47r?

thank you.
 
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I have tried both the simple bias spreader and the CFP. I prefer the CFP, and especially so if your TIS current is high (few 10's of mA), or is likely to vary with signal level and/or output load.

1. CFP instability - easy to fix - place a comp cap between the base and the collector of the sense transistor. A few nF will suffice, but I have used much higher values.
2. Temp compensation - easier said than done! Most practiitoners recomend you place the bias spreader in thermal contact with the drivers and mount the drivers on their own heatsink. For a triple, I found this unsatifactory, and mechanically complicated.
3. My solution was to use a CFP and then include a NTC resistor circuit between the top of the spreader and the base of the sense transistor. This works really well, and holds the Iq stable over a broad temperature range. You can read about my experience on page 37 of the e-Amp article on my website. pre-drivers, drivers and outputs all mounted on the same heatsink which is nice and convenient.
4. Temp comp for straight EF2 output stages is generaly a lot easier - so no need for NTC's or anything like that.
5. Bypass cap: this is really just to ensure the spreader circuit is seeing DC, or very low frequency. I have used values of between 10uF and 47uF. If you do not install a bypass cap, the spreader voltage can increase at high frequencies as the spreader loop gain drops off - I would suggest you always fit it.
 
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A B-C miller cap is not the best way to compensate a CFP, though it may still prevent oscillation. A 10nF cap across the B-E of the slave transistor is a better way. I learned this from my Kmultipliers. The value of this cap changes with driver and slave bias currents but In my experience 10nF is right for this range. Iq shift should not be a problem for a Vbe multiplier.

If a CFP is used I would avoid using less than 100nF film bypass capacitance, as values around 10nF and under are the most likely to cause oscillation. It is generally stable into anything over 10nF (or maybe 1nF, I don't remember). And this is total capacitance, so for instance 1nF+10uF bypass would be okay.
 
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Dave, you are right but without the transistor the compensation resistor value can increase quite a bit. If the VAS sees significant load capacitance this can be undesirable. However this should not be a problem if the bias generator is decoupled.

I think the gist of it is, any compensated Vbe multiplier will work well enough barring specific fault and tempco requirements. But if the bypass cap makes an audible difference then the quality of the bias generator circuit should too. So those concerned with sonics probably want to try out different things.
 
Because the cap is across the B-E junction, it causes integrative current gain as a function of transconductance for the slave transistor. Since transconductance is proportional to Iq, corners and GBWP are also proportional to Iq. Thus Gm needs to be compensated with degeneration or other methods when a CFP will be used across a wide current range. If at any point the Ib of the slave dominates the Ic of the master, the master's Gm will need stabilized as well.

I meant the value chosen for the cap, not the cap's actual value, in case it was unclear.
 
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"I meant the value chosen for the cap, not the cap's actual value, in case it was unclear."

Ok, that clears that one up!

You seem to imply tha GBWP is moving around a lot. If the spreader is decoupled well, it should only be dealing with low frequencies, assuming all other things are correct.
 
An amplifier is usually band-limited to the audio range by an input LP filter, but it is still possible for it to oscillate into a reactive load. The same is true for triple EF output stages, and CFP Vbe multipliers. The problem is not one of external signals causing oscillation; it is the inherent instability of the circuit in question regardless of which signals it can "see".

However now I remember something else important about CFP Vbe multipliers. Any active voltage regulator with lower output impedance than the Gm of its output device will exhibit a virtual output inductance. This virtual inductor can have high Q. For this reason even a stable CFP Vbe multiplier can cause an amp to oscillate because it forms an RF resonator with capacitances in the VAS output area. This is one major caveat emptor with all active voltage-output circuits. Apart from slowing the CFP down so much that virtual inductance is very large, in which case its usefulness as a Vbe multiplier may suffer, the only solution is an RC snubber across its output.

So while a CFP Vbe multiplier may seem like an expedient option, it has many potential liabilities and if you don't understand it thoroughly you may scrap a good design unaware that the only problem was the unstable or resonating bias generator.
 
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It looks inductive because the loop gain drops off at HF, and hence it's terminal to terminal output impedance increases. The solution is simple, and analogous to what you would do with a three terminal reg, or a shunt reg like a TL431: bypass the output with a suitably sized capacitor. Internal loop comp of the CFP - either through a cap b-c on the sense transistor or the method you propose of course goes without saying.
 
You are right about the large capacitor bypass. I forgot that I was recalling this from years ago before I learned how to compensate a CFP. Without compensation it would sometimes oscillate into the lytic just like an overreactive amplifier into a loudspeaker cable.

One valid way of reducing Vbe multiplier impedance is by bypassing the C-B resistor with a capacitor. Because the base node is relatively high impedance, the same size cap will cover much lower frequencies. This is super-effective for a CFP, but alas, it is also one of the things that will make it unstable. If not small enough or insufficiently large, it causes a second pole in the middle of the inductive region and maddening instability is back.

Using a feedback bias generator is nice and fun until you end up having to treat it like a high-speed opamp. It can be especially frustrating if you don't understand all these relationships. And this is a lot of unnecessary work if a precision bias generator was never needed in the first place.