I didnt even notice.....
My answer was for VGS , of course....
I don't think that Vds is critical. The Vds imo is about how much power we want to get from the amplifier. But 10V is about the minimum where linearity is guaranteed for normal current/power for amplifiers.
The critical ones are drain current (Id) and Vgs.
We don't want Vgs to be below its threshold, which is batch dependent, but when Vgs is ensured to be able to turn the device on, it seems that higher Vgs is not better soundwise, based on my experiment with Hexfet in Aleph amps. May be because the higher the Vgs, the higher the input capacitance??
Another interesting issue is whether running very high Id (like in Hexfet) is beneficial with Latfets. From my experience I cannot hear improvement with such a high current, but some have noticed that the sound performance is even worse! May be because the switching time (mainly t-on) gets worse when Id gets above 300mA??
I forgot what Hugh (AKSA) had mentioned about this in another thread. I need to copy that.
The quiescent Vds is set by the PSU voltage.
When the amplifier is passing current to the load the Vds of the output pair is swinging and reaches a limit when Vds = 0 and when Vds= |-V| + |+V|
If the Vds moves towards zero volts then the amplifier begins to distort due to non linearity of the FET's characteristics. The NFB does it's best to attenuate these distortions. But then gives up the unequal battle and we hear clipping and the increase in distortion just before clipping.
If you want to avoid the Vds=0 limiting condition then never drive the output to near clipping. This can be done by giving the output stage higher supply rail voltage than the driver stage. JLH did this with one of his ClassAB FET amps and many thought he got the voltages wrong in the schematic. I think he was simply ensuring best audio quality. That was always what he tried to attain.
When the amplifier is passing current to the load the Vds of the output pair is swinging and reaches a limit when Vds = 0 and when Vds= |-V| + |+V|
If the Vds moves towards zero volts then the amplifier begins to distort due to non linearity of the FET's characteristics. The NFB does it's best to attenuate these distortions. But then gives up the unequal battle and we hear clipping and the increase in distortion just before clipping.
If you want to avoid the Vds=0 limiting condition then never drive the output to near clipping. This can be done by giving the output stage higher supply rail voltage than the driver stage. JLH did this with one of his ClassAB FET amps and many thought he got the voltages wrong in the schematic. I think he was simply ensuring best audio quality. That was always what he tried to attain.
Ok, thanks for your reply.
In fact i tried to make a amplifier with only +-21V,but when i watch the typical output characteristics curves(in attachment), i understand why i don't succeed to have a minimum of distortion.
I'll try with higher voltage supply.I'll give a return, by.
Christophe
In fact i tried to make a amplifier with only +-21V,but when i watch the typical output characteristics curves(in attachment), i understand why i don't succeed to have a minimum of distortion.
I'll try with higher voltage supply.I'll give a return, by.
Christophe
Attachments
According to this curve a 4V Vgs is enough for the device
to conduct 2.5A at 5V Vds.
This means that an amp with +-21V supply can provide about 16V peak
output level in a 8R load quite easily.
I myself use theses devices , or rather their TO3 siblings 2SK133/2SJ48 ,
in an amp using +-22V supply voltage , although in a triple pair arrangement
that will allow to have lower Vgs for a given output voltage.
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