Has anyone seen this front-end before?

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Here are the tests with and without the EC buffer respectively. And a very strange peak (harmonic?) at 60KHz.

So as I expected, with such a simple circuit and fast transistors, frequency doesn't really impact performance even when the output is loaded by an IRF250 gate. My current listening amp is an IRF250 biased at 500mA. That has to do until I have an idea how I want to design my next discrete amp.
 

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The EC stage is biased into class A at 10mA by a 1k resistor. So it is basically unaffected by any load impedance over 5k. Its output is fed into the gate of the IRF250 fireball (for speakers), which is its own construction. If I want I can bypass the buffer or I can listen to the buffer with headphones without the IRF250 amp.

I'm measuring the EC stage on it's own; I really am not very interested in the measurements of the IRF250 amp, so I haven't actually thought about measuring it.
 
Revival

Hi Edmond
I finally worked out feedback theory and probe technique sufficiently well to do a bit more on this circuit.
I would like to better understand some of the loops, especially the conditional stability.
I seem to remember that you eventually downloaded a copy of LTSpice.
Do you have this circuit as an LTSpice ASC?

Best wishes
David
 
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Hi Edmond
I finally worked out feedback theory and probe technique sufficiently well to do a bit more on this circuit.
I would like to better understand some of the loops, especially the conditional stability.
I seem to remember that you eventually downloaded a copy of LTSpice.
Do you have this circuit as an LTSpice ASC?

Best wishes
David

Hello Dave,

It does not really matter if somebody does not use the same simulator that you do , you can still ask the questions as different simulators should give the same results provided all the models and the circuit are the same.

Regards
Arthur
 
It does not really matter if somebody does not use the same simulator that you do , you can still ask the questions as different simulators should give the same results provided all the models and the circuit are the same.

I know that Edmond had previous problems with inconsistencies between simulators that should produce the same results.
But mainly I just wanted to save the time to re-enter all of Edmond's circuit and models.
Plus eliminate the inevitable errors and discrepancies.
You followed this thread, do you have an LTspice version?

Best wishes
David
 
Hello Dave,

I use the Simetrix simulator. I stopped using Ltspice a couple of years ago, because its unaided convergence was not as good as simetrix.

Somebody experienced with Ltspice should have no problems simulating the loop gain plots that you want to do.

I am tempted to relearn Ltspice because it is the defacto standard on diyaudio.

Regards
Arthur
 
Hello Dave,

I use the Simetrix simulator. I stopped using Ltspice a couple of years ago, because its unaided convergence was not as good as simetrix.

Somebody experienced with Ltspice should have no problems simulating the loop gain plots that you want to do.

I am tempted to relearn Ltspice because it is the defacto standard on diyaudio.

Regards
Arthur

Hi Arthur,

There have been times when convergence with LTspice have indicated to me a problem in the circuit or the models.

All I'm saying is, be on the watch when you get DC convergence difficulties.

Cheers,
Bob
 
I often see LTSpice struggling with convergence to operating point solution with high loop gain, particularly with op amps in the loop

while just putting up with a startup spike in.TRAN is possible – I then don't trust the .AC

I had a scary LTSpice convergence issue over xmass - I tried something related to Pass SuSy and it worked like a dream 1st few runs of the sim

I then made a few "clean up" changes - not expected to do anything to loop gain - and I spent hours getting back to a circuit configuration with any DC solution at all

now have .savebias/.loadbias file pair started up by .nodeset statement and letting that poor operating point solution bootstrap with 100 ms runs with 0 input to amp, still have to fall back to the .nodeset with some changes

I would have dismissed the whole approach if I hadn't seen the sim work in the 1st few tries
 
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Hello Guys,

Bob as a rule I use only the models for your website along with Harry driver transitors, and I dont stray from these. Your diodes and LEDS I also use.
But I do agree with you models can cause problems.

High loop gain is where I have problems as explained by jcx with LTSpice .

Thanks for you input Ian, I will look at initial condition setup .


Regards
Arthur
 
Hi Arthur,

There have been times when convergence with LTspice have indicated to me a problem in the circuit or the models.

All I'm saying is, be on the watch when you get DC convergence difficulties.

Cheers,
Bob
I'm very with you! To me this has always been a hint at instability/erraticness in the schematic. Opamps can make it more suspectable to convergence problems. Simple fixes I noted amongs them was putting proper compensation across opamps, sometimes inserting a resistor in the inverting input lead from output (in case of a unity gain configuration) and a comp cap across. Base/gate stoppers can be another impactless fix.
 
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