Projecting an amplifier with dual input with current mirrors - Page 2 - diyAudio
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Old 13th February 2012, 12:25 PM   #11
godfrey is offline godfrey  South Africa
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Regarding the circuit in post 9:

There's one fundamental problem there. R2 and R9 are connected to +-13V rails, but R14, R15, R30 and R31 are connected to +-50V rails. That won't work, they have to be connected to the same supply rails. I'd suggest removing R7, R21 and the zeners and running everything off the +-50V rails. (OK, I'd probably drop the supply to +-35V and settle for 50W or so output power, especially with only one pair of output devices. YMMV)

Next problem is the VAS has very low current gain. At the top, it's defined roughly by the ratio of R9 to R30, and at the bottom by the ratio of R2 and R31. So even though you're using Darlingtons, you're only getting a gain of about 10.

I'd work it out as follows:

Current through Q13 and Q14 wants to be at least 10 to 20 mA. Let's say 20 or a bit more. Then R30 and R31 can be redused to 22 ohms each. They still each have about half a volt across them, which should be plenty enough for stability of idling current vs temperature etc.

Now there's going to be about 2V (or a little less?) across each of R2 and R9. If you make them 2.4K each, you get a current gain of about 100 from the VAS. To get the correct voltage drop across them, you need to reduce the input stage idling current, probably to about half, i.e. roughly double R1 and R11.

After that, it's fine tuning. I'd probably reduce R14, R15 and R24 to about 1/3 of their current values, to increase the idling current through Q11, Q12, Q16 and Q17. Output stage bias should be adjusted for about 25mV across each of the emitter resistors (R25 and R26). Adding emitter resistors to Q2, Q3, Q8 and Q9 is probably a good idea too.
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Old 13th February 2012, 12:31 PM   #12
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The latest version has a problem with all the VAS transistors running at much too high current. You're going from +/-13 V referenced to +/-50 V referenced. Needs some level shifting or somesuch.

Speaking of which, I don't think all the devices used are really suited for +/-50 V rails.

EDIT: Too slow.. ;-/
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Old 13th February 2012, 04:58 PM   #13
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Default thx

godfrey you were alright! after implemented these changes the amplifier works almost perfectly i had to add C4 and C10 and reduce C6 to 10pF to remove self-oscillation! now i try some instrumentation on multisim because is the first time i use this program. the output stage i know is under dimensionated but i use only 2 finals for testing purpose, in the final realization the output stage will be 4x 2sc5200 and 4x 2sa1943, and BD139 and BD140 wil be 2sb834y and 2sd880y. i'll post now new schematic and ms12 file and later some measurements.

one last thing i need to know, why resistor in input stage transistor's collectors must be disequal?
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File Type: pdf my_amp.pdf (39.9 KB, 24 views)
File Type: zip my_amp.zip (363.7 KB, 3 views)
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Old 13th February 2012, 08:02 PM   #14
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Default measures

these are measures on the amp over a 2 ohm load. i intend to use this on an active subwoofer. the gain is -3db at 15.9Hz so i think isn't bad is the pahse alright?
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File Type: pdf ac_analisys_my_amp.pdf (31.1 KB, 8 views)
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Old 13th February 2012, 08:21 PM   #15
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Quote:
Originally Posted by hyperblaster89 View Post
one last thing i need to know, why resistor in input stage transistor's collectors must be disequal?
One leg has to supply base current, and equal resistors would mean that differential amplifier currents would get imbalanced. Hence the use of current mirrors, though one has to take care not to end up with undefined VAS current.
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Old 13th February 2012, 09:00 PM   #16
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Quote:
Originally Posted by sgrossklass View Post
One leg has to supply base current, and equal resistors would mean that differential amplifier currents would get imbalanced. Hence the use of current mirrors, though one has to take care not to end up with undefined VAS current.
perfect, thanks!
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Old 14th February 2012, 07:45 AM   #17
godfrey is offline godfrey  South Africa
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Quote:
Originally Posted by hyperblaster89 View Post
...the amplifier works almost perfectly...
Excellent! I assume you checked the voltages and currents all around the circuit to make sure they look reasonable and all the transistors are operating well within their safe limits.
Quote:
Originally Posted by hyperblaster89 View Post
...why resistor in input stage transistor's collectors must be disequal?
I disagree with sgrossklass on this. R3 and R10 actually don't do anything useful, so you can just leave them out. Some designers include them and make them equal to R2 and R9 because .... um.... I dunno - because it makes the circuit diagram look pretty or "balanced" or something?

On a related note; R6, C5 and C7 don't seem to be doing anything useful either, so you could leave them out as well.
Quote:
Originally Posted by hyperblaster89 View Post
...the gain is -3db at 15.9Hz so i think isn't bad is the pahse alright?
Actually, there is a slight problem here, which won't show up in the simulator. But first, remember there's no problem getting whatever low frequency response you want. In a circuit like this, there's two low frequency roll-offs: one due to C2 and R5 at the input, and the other due to C3 and R28 in the feedback network. In each case, the roll-off frequency = 1/(2*Pi*R*C).

With your values, the input filter rolls off very low (about 0.03Hz), and C3 + R28 causes the roll-off at 16Hz. The problem is that electrolytic capacitors are quite non-linear, causing distortion, and they really don't like having reverse voltage across them. To minimize the distortion and keep C3 happy, you need to have as little signal voltage across it as possible, which means setting that roll-off to a very low frequency (around 1Hz is normal, but feel free to go lower), and choosing the input cap (C2) to give the desired rolloff.

If you reduce C2 to 1uF, then you can use a plastic cap (without robbing a bank), and still have -3dB at about 8Hz. In the feedback network, I'd increase R27 and R28 ten-fold to 22K and 1K, and maybe increase C3 as well. There's another reason to make R27 the same as R5 (at the input) - it helps to reduce DC offset. In a complementary design like this, it's less important since the base currents of the NPN and PNP input devices will cancel to some extent anyway, but it can't hurt to match those resistors.
Quote:
Originally Posted by hyperblaster89 View Post
...had to add C4 and C10 and reduce C6 to 10pF...to remove self-oscillation...
Hmm... Are you sure it's stable? I'd have expected it to need heavier compensation. To check, you need to do an AC analysis of the loop gain. That is the total gain round the loop from the input to the output, and back through the feedback network to the input.

As you go up in frequency, the loop gain reduces, and the phase shift increases. For stability, the loop gain has to reduce to zero dB before the phase shift reaches 180 degrees.

If there's no fancy tools in your sim to help, the pic below shows one way to do it.
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Old 14th February 2012, 09:47 AM   #18
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Default phase analisys

godfrey i checked almost all voltages and currents but whit my understanding i'm not able to judge if everything is correct. now i made the ac analisys on the schematic you've posted and this is the result... i think is there's something wrong since i've never seen a phase plot like this one
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File Type: pdf loop_analisys.pdf (33.0 KB, 5 views)
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Old 14th February 2012, 10:11 AM   #19
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Default mistakes

i've made all changes godfrey had suggested and this is the new version of amplifier with ac analysis and loop analysis
Attached Files
File Type: pdf my_amp.pdf (39.1 KB, 16 views)
File Type: pdf ac_analysis.pdf (32.1 KB, 3 views)
File Type: pdf loop_analisys.pdf (32.8 KB, 5 views)
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Old 14th February 2012, 01:50 PM   #20
godfrey is offline godfrey  South Africa
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You have to look further up - at least to 10MHz. In your loop_analysis.pdf, you only go up to 100KHz, where gain is still about 30dB. You need to go up to where loop gain is dropping below 0dB.
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