Another op amp based amplifier.
Please review this design where my main concerns are.
Cheap easy to source parts.
Three files attached:
Doc about the amp.
A bridged version.
I think you made a good summarizing job yourself.
With such small emitter degeneration resistors (I understand why they are necessary for good performance), the design will be quite sensitive to initial mismatches and thermal tracking issues.
Regarding electrical stabilty, I think it would be wise to tie C1 to the output of U1.
Closing the complete loop in HF would probably stress U1's stabilty margins to the limits.
what are the goals of the design:
load Z range, frequency response, Power, acceptable distortion limits...
is Class B bias a design requirement?
Thanks for your inputs.
Resistor degenerative values. I don't really know what is a right value for a good compromise, more stability / less max output power. Any idea ?
My first design had no C1 capacitor. I added it for band limiting, it gives some better THD at 20KHz, about none at 1KHz.
I did not thought about tying C1 at the output of U1. I just tried this, it lowers THD 1KHz to 0.002% ( from 0.00016% when tied at the overall output ). I do not understand the reason why..
Low power ( tri amplification ).
Class B for efficiency and fun to study its thermal stability issue ( a topic mostly overlooked or handwaved ).
Class B efficiency means reasonable heatsinks and PSU costs which is a large part of amplifier systems cost.
Looks nice. If I were to offer some suggestions for changes to try out:
a) increase emitter degeneration from 0.01 (which is probably the resistance of the wiring) to 0.22
b) you need some parasitic compensation caps to stop the CFP oscillation - a 47pF cap between base and collector for Q1 and for Q2.
c) you can increase the voltage swing at the output with the addition of some resistors. You have CFP output where the voltage gain from Q1 (and Q2) is 100% applied to local feedback from the collector of Q5 (Q6) to the emitter of Q1 (Q2). So break this link with a resistor and tie the emitter of Q1 (and Q2) to the output via another resistor each. With the right choice of values you can release a little of the voltage gain from the CFPs to increase output swing - x2 would probably be a good amount.
Since you have gobs of fdk from the op-amp to keep distortion down the above changes likely won't be an issue to the sonics.
d) add an input rf filter and a zobel to the output
e) the current sources will be more stable with a small capacitor between bse of Q7 (Q10) and base of Q8 (Q9) of value around 1nF
f) maybe PSRR of the amp can be improved by adding some bigger caps to the current sources in the right places
g) make one current source adjustable, e.g. R2, so that you can set dc-offset. Or you could turn one of the current sources into a dc-servo if you want to get fancy by adding another transistor or two.
Thanks, Bigun for your many inputs, I agree with.
About a x2 CFP current booster. I had a go at this.
From LTspice, I saw, one needs very smal resistor values in order to NOT lower much the THD ( small resistor values below 50 ohms ).
And using 2 resistors ( instead of 4 as I saw in many designs ) is much better.
This x2 CFP has bad reputation about thermal stability ( Rod Elliot says it is a no no ).
I don't know yet how to study this.
I don't know what the issues are myself either. But thermal stability is something you can simulate. Right click on the name of the device, e.g. "BD139" and then in the edit box change it to "BD139 temp=40" to set the temperature of the device for the simulation.
You may need temperature compensation, i.e. the bias diodes have to go on the heatsink with the output devices.
Spice is very limited about temperature simulation.
Indeed one can set a temp at each BJT junction. However this temp will not change during a simulation showing how things go when BJT's get hot or cool down.
The bad joke is Spice considers temp as a variable. Temp is actually a constant.
The only thing one can do more in a Spice simulation, is implementing the Vbe decrease with junction temperature, adding device temperature models.
Spice is only giving some help asking for many simulations and manual side work.
But in a way, he goes against his own advices:
Adding gain to the CFP will also introduce degeneration resistances, unless ridiculous amounts of power are spent in the resistive dividers.
The dividers will also reduce further the already small amount of feedback from the degeneration resistors.
All that amounts to dumbing down of the original scheme.
The clever thing to do is to include those advices without dumbing down the initial quality: creating voltage gain in the output stage without degrading the linearity or decreasing the thermal feedback from the emitter resistors.
Active feedback blocks might be an answer, that attenuate the main signal by the required gain, but amplify the difference across the degeneration resistors.
M J Renardson has some nice ideas about those subjects.
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