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-   -   Amp design for subwoofer and wideband duty (http://www.diyaudio.com/forums/solid-state/198209-amp-design-subwoofer-wideband-duty.html)

Bensen 9th October 2011 09:24 PM

Amp design for subwoofer and wideband duty
 
3 Attachment(s)
Hi,

I have made 5 years back the Crescendo ME amplifiers from Elektor which are used in bridge mode to drive my peerless XLS12 sub with passive radiator.

Sofar, I haven't made an amplifier from my own hand, this will hopefully change in the future.
I've made a circuit in LTspice;
In the attachment you can find the schematic, FFT analysis 220W@4 and a phase margin plot.

The amp itself is not that complex. It's a complementary design with a differential vas which are driving directly a 2SK1530/2SJ201 OPS.
The vbe multiplier used in the schematic will be replaced by a 2SK2733 Fet multiplier (have no spice model for that one).
I used miller compensation around the Vas stage and lag at the feedback network.

May I ask to take a look at the attachments and give me some feedback. The goal is to use two of these amps in bridge mode to drive a subwoofer with an impedane of 8Ohm / 250Wrms.

Thanks


EDIT 23/02/2013

The project is finished, see: http://www.diyaudio.com/forums/solid...ml#post3382545

wahab 9th October 2011 09:36 PM

I ve tested such a complementary differential with a differential VAS.

Make sure that the pairs are VBE matched , otherwise the results
are a nightmare.

The two VAS pairs must have the same VBE for the two sides,
while for the input differentials only the same polarity pairs must
have very close matching.

For a subwoofer amp , i would stay with the crescendo topology..

Bensen 10th October 2011 02:54 PM

Thanks for the feedback wahab,


With nightmare, do you mean DC-offset by this?
What do you think of using drivers with this OPS, will it bring not that much difference concerning bass response?
I noticed that Anthony Holton isn't using drivers in his symmetry amp either.

wahab 10th October 2011 06:57 PM

Using drivers will reduce distorsion at high frequencies but will
also reduce stability, wich can be solved by increasing the compensations caps.

For a woofer amp , drivers are not strictly necessary.

Also , the power mos you re using dont suit without temperature compensation,
since they have a positive temperature coefficient , contrary to hitachi/renesas
lateral fets 2SK1058/2SJ162 who allow for a simple resistor to set the bias.

Bensen 10th October 2011 07:47 PM

1 Attachment(s)
You've made me doubting the differential vas. At this moment I have running the Old Crescendo's (2x 2SK135/2X 2SJ50) and the Crescendo ME's.

If I'm building a new amp, I really wan't to use another topology. This to learn and to hear what the sonic difference could be. Even if it is not really necessary for a subwoofer amp.

I've the same amp as in post nr1 redrawn with a darlington vas. Simulation wise I get identical results with identical compensation cap values. But the one with the darlington VAS shows 0.8V DC offset, I don't understand were that comes from? If I short circuit the high pass input filter, the DC offset decreases to 50mV.

The reason wy I've choosen to use the vertical's instead of the Laterals is:
1: Output wattage is bigger with the verticals Vds = 2.5V vs 12V
2: The vertical's are easy to obtain
3: The vertical's have proven me to be verry rugged (if the gate stoppers are mounted as close as possible to the gates) (have burned about 20 of them until the leight in my head has turned on)


If either the differential or darlington VAS is better suit to be used in bridge configuration, I really would like to hear the reason for this. When I see the time in a couple of days I start building this on a vero board, just to test a bit.

AndrewT 11th October 2011 10:59 AM

I would say that there are 4 versions of output devices that can be used in Power amplifiers.
BJT - silicon
BJT - germanium
FET - lateral
FET - vertical.

I believe that all 4 need to be approached differently at the design stage.
I further believe that one cannot simply swap between any of these types when an amplifier is designed to perform properly with only one of those types.

ingenieus 11th October 2011 01:15 PM

Quote:

Originally Posted by Bensen (Post 2741282)
I've the same amp as in post nr1 redrawn with a darlington vas. Simulation wise I get identical results with identical compensation cap values. But the one with the darlington VAS shows 0.8V DC offset, I don't understand were that comes from? If I short circuit the high pass input filter, the DC offset decreases to 50mV.

A few details might have to change. Sounds like a challenge. :D

Can you please post the LTspice file? It would save us the trouble of drawing the circuit again.

Just change the extension from '.asc' to '.txt' otherwise the forum software will not allow it.

wahab 11th October 2011 04:21 PM

Quote:

Originally Posted by Bensen (Post 2741282)

I've the same amp as in post nr1 redrawn with a darlington vas. Simulation wise I get identical results with identical compensation cap values. But the one with the darlington VAS shows 0.8V DC offset, I don't understand were that comes from? If I short circuit the high pass input filter, the DC offset decreases to 50mV.

Since the differential s collector resistor were not increased , the darlington
VAS cant work properly as the voltage drop in this resistors is not
enough to reach an adequate Vbe...

Increase R5/6/7/8 to about 1.5 to 1.8K...

That said , using a darlington VAS will not bring a lot of perfs while
reducing stability , so the miller caps should be increased in respect
of the original value.

Bensen 11th October 2011 05:50 PM

1 Attachment(s)
Hi Andrew,

I will go for the Vertical's, I have no doubt about that. What are your thoughts for taking care of during a design with VFet's? Idle current of the VAS is important when driving directly the OPS, Vas idle current is +-20mA.

Ingenieus,
I zipped the .asc file and put the spice models for the BJT's in text on the circuit.

Wahab,
You're right, the voltage across the collector resistors from the diff stage was only 680mV's. I increased the resistor values to 1K8 ==> DC offset decreased to 25mV's.
Concerning the compensation cap values, when using the original values (22pF) I'm still having a phase margin of 88.


Greetz

ingenieus 12th October 2011 07:57 AM

Thanks for the zip archive, but it only contains the .raw file with the results of your Operating Point simulation.


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