Simple Symetrical Amplifier

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shaan..

I agree the VBE-mult does stabilize the bias-spread..but at the cost of reducing the bias current twice with temperature..to me this makes an emphasis on the typical soft character of the Lateral mosfets..
An alternative could be to keep the VBE away from the heat-sink.. then you reduce negative temp-co to that of the mosfet itself...
 
What about an IR led instead of D1+D2?:)

The higher the volt drop the higher the bais current. A RED led is about 1.5V and would set the bias around 240 mA same as two diodes. Thus you would dissipate around 8 watt per output device.

I cannot remember the exact reference but some engineer at Texas Instruments wrote a paper on an amp design and found that the optimum bias setting for Hitachi 2SK1059/2SJ162 is around 180 mA for the lowest distortion. I posted the article toward the end of one of the two Goldmund threads of late.
 
shaan..

I agree the VBE-mult does stabilize the bias-spread..but at the cost of reducing the bias current twice with temperature..to me this makes an emphasis on the typical soft character of the Lateral mosfets..
An alternative could be to keep the VBE away from the heat-sink.. then you reduce negative temp-co to that of the mosfet itself...

I think lateral FETs have positive tempco. Yes with the laterals the vbe multiplier has nothing to do on the heatsink and can rest on-board. It should be placed on the heatsink IF we are using vertical devices.
 
I cannot remember the exact reference but some engineer at Texas Instruments wrote a paper on an amp design and found that the optimum bias setting for Hitachi 2SK1059/2SJ162 is around 180 mA for the lowest distortion.
Funny, on my amp, tuned for best listening with my ears, i had finished with around 150mA per unit (300mA total by channel for 2 // mosfets). Is is perfect as it gives a Class A for the normal listening level with all the power margin you need for pics.
 
If someone would like to make high performance SSA, here is my proposal. Of course I could make it even more complex but I think this one would have enough zeroes for minimal THD lovers. ;)

Hello Lazy cat ,

Could you please verify if this schematic posted here in post 347 is valid
 

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just wanted someone to check through my work and to share it with you all.

i know there are no values on the res and caps but i can play with that later as ill take them from the many posts and play with the averages.

thanks for looking, any comments thanks in advance, steve.
 

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Hi a.wayne ;)

SSA schematic is different, as some compensating caps were added.

You need 1000W on which impedance? In accordance to current level and SOA, the number of output BJTs and supply voltage can be calculated. Output stage current gain is enormous so there should be no problem driving it with proposed front-end. :)
 
Hi a.wayne ;)

SSA schematic is different, as some compensating caps were added.

You need 1000W on which impedance? In accordance to current level and SOA, the number of output BJTs and supply voltage can be calculated. Output stage current gain is enormous so there should be no problem driving it with proposed front-end. :)

Hello LC... goal is 600-800 watts/ch into 1 ohm or 20 amps capability per channel.can i substitute the NJL outputs for MJL , is there a difference ...?
 
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Hello LC... goal is 600-800 watts/ch into 1 ohm or 20 amps capability per channel.

a.wayne no problem ;)

For the power 800Wrms/1ohm, peak output voltage will be 40Vp, and peak output current 40Ap. Output transistors behave normally up to Ic=6-7Ap so you would need six pairs of the outputs, +/-50V supply voltage for the output stage and +/-60V for the SSA front-end. Some components values have to be recalculated and I can prepare this especially for your specific case till tomorrow. :)
 
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