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Old 3rd July 2012, 07:08 AM   #2701
dadod is offline dadod  Croatia
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Quote:
Originally Posted by Jay View Post
Hehehe nobody likes high distortion especially when it is third order. The only objection I have with this circuit is the relatively higher 3rd order distortion as compared to 2nd order. I would prefer higher overall distortion but from 2nd order.

You didn't do something wrong I believe. Here is a trick:

The FB resistor (1K) is connecting the input transistor's emitor and the output.

You want the input transistor to have Vbe of at least 0.6v (approximation). Base voltage (Vb) is assumed zero and so is output voltage (Vout). So to get 0.6v at the emitters (Ve) you want a certain current thru the FB resistors (This is what the CCS is for).

V = 0.6V
R = 1K
I = calculate! ---> 0.6mA.

CCS current == current thru FB resistor + current thru transistor

Note that the current thru the transistor is also affected by the collector resistor (1K here, which is a good value). This current is around 0.5mA. So more or less you want the CCS to give out 0.6mA+0.5mA = 1.1mA.

You may want to set both CCS to output 1.2mA. You will find that the higher the current, the lower the distortion. That's why you got ("too") low distortion when you use higher zener voltage which affect the base voltage of the CCS, giving very high current I believe.

But I suspected that it would be better (e.g. for the stability) if top CCS gives different current than the bottom CCS. With positive voltage at the output you want the top CCS to have slightly higher current. You can try 1.2mA for the top and 1.1mA for the bottom CCS.

That's just my guesswork, you will have to troubleshoot the correct setting after you build it (if you intent to). In Christophe's circuit, top CCS has 3K3 and bottom CCS has 3K32. This means that the top CCS has slightly more current (I guess). But unfortunately the base voltage of the ccs also determines the current. I guess that you need to work out the 3K3 resistors on the CCS and the 30R resistor at the base of the VAS transistor.

You owe to yourself to build any of the SSA amp. Better is the more complex one.
I know how to change those things. Problem is that I whanted to repeat Esperado's simulation, and my result are catastrochic(with 3.9V of a voltage source instead of 3.9V zener). Bandwidth is up to 14kHz and distortion is terible.
What should be the VAS current? It seams that with your suggested CCS current, it is to low for my liking(1-2mA). JLH used 10mA in his 80W MOSFET where VAS drives laterals directly.
dado
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Old 3rd July 2012, 07:33 AM   #2702
dadod is offline dadod  Croatia
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By the way, the most elegant way to set CCS current is changing D1 and D3. In this case the cascode voltage is changed in the same time, and in this case is incremented for better work of Q7 and Q9. With a zener of 5.6V CCS current is set to 1.5mA and VAS current to 14mA. Phase marigin was not changed(47degree). Distortion drops even more.
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Old 3rd July 2012, 09:24 AM   #2703
Jay is offline Jay  Indonesia
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Quote:
Originally Posted by dadod View Post
I know how to change those things. Problem is that I whanted to repeat Esperado's simulation, and my result are catastrochic(with 3.9V of a voltage source instead of 3.9V zener). Bandwidth is up to 14kHz and distortion is terible.
Have you simmed the other SSA circuits? They are all terrible. But it has been reported that measured performance is better than simulation.

This SSA front end is intriguing.

Quote:
Originally Posted by dadod View Post
What should be the VAS current? It seams that with your suggested CCS current, it is to low for my liking(1-2mA). JLH used 10mA in his 80W MOSFET where VAS drives laterals directly.
dado
The CCS is for the front end, not VAS. You have to pay attention to the operation of the input transistors. But you're right, that the VAS current is too low (tho it is not the determinant factor) and I don't like most circuit where output is driven by VAS. That's one reason why I have never built this circuit (all components, parts, everything is already prepared, just need soldering).

I have tried to design some "better" circuits based on this SSA_Crescendo, with hot VAS transistor etc. The only thing I couldn't achieve was stability! But I suspect that by "trimming" the CCS (e.g. top CCS has more current than bottom CCS) stability can be achieved better, but I haven't tried it.

Quote:
Originally Posted by dadod View Post
By the way, the most elegant way to set CCS current is changing D1 and D3. In this case the cascode voltage is changed in the same time, and in this case is incremented for better work of Q7 and Q9. With a zener of 5.6V CCS current is set to 1.5mA and VAS current to 14mA. Phase marigin was not changed(47degree). Distortion drops even more.
Actually there are many better ways when stability is not an issue (e.g. separated ccs or bias networks, use of voltage dividers, etc).

Problem with zener is we cannot trim a zener voltage easily, unless we put a resistor in series like Christophe did. It is easier when all voltage is controlled by "voltage divider networks". It is easy to achieve good performance but stability. And this SSA circuit is tricky. We must have precise model and measured transistors, which we don't. I just don't want to risk my laterals during tweaking, that's all. But I would love to see you continuing your simulation to building. At least, you are more experienced than me.
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Old 3rd July 2012, 09:33 AM   #2704
wahab is offline wahab  Algeria
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Originally Posted by Esperado View Post
.

Wahab, please, play with my simulations here, Crescendo revisited
One thing is intriguing , what is the measured voltage value through R12 and R26 in real world ?.
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Old 3rd July 2012, 10:11 AM   #2705
dadod is offline dadod  Croatia
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Quote:
Originally Posted by Jay View Post
Have you simmed the other SSA circuits? They are all terrible. But it has been reported that measured performance is better than simulation.

This SSA front end is intriguing.



The CCS is for the front end, not VAS. You have to pay attention to the operation of the input transistors. But you're right, that the VAS current is too low (tho it is not the determinant factor) and I don't like most circuit where output is driven by VAS. That's one reason why I have never built this circuit (all components, parts, everything is already prepared, just need soldering).
I simed a time ago some of the other SSA circuit with no good result so I left it be.
Now, again, I tried with this from Esperado and my result a far away from Esperado's even if he does not say, for THD, at what frequency and power sim was done.
I would like to see his FFT also
Yes CCS is for front end, but changing the CCS current the VAS current was changed too.
For the moment I do not have intention to build SSA(all my laterals are in JLH MOSFET amps) as I am occupied to finish my six channel TT amps.
dado
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Old 3rd July 2012, 10:24 AM   #2706
wahab is offline wahab  Algeria
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Yes CCS is for front end, but changing the CCS current the VAS current was changed too.
Of course since the CCS current set the lower VAS transistor base voltage.
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Old 3rd July 2012, 11:00 AM   #2707
Jay is offline Jay  Indonesia
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Originally Posted by dadod View Post
I simed a time ago some of the other SSA circuit with no good result so I left it be.
You have to know where those bad numbers came from in order to get a good SSA. The input transistors are the key.

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Originally Posted by dadod View Post
Now, again, I tried with this from Esperado and my result a far away from Esperado's even if he does not say, for THD, at what frequency and power sim was done.
If you properly choose the front end transistors, I believe you will not see bad distortion in real life as you see in the simulation. To "see" (or predict) the performance of this circuit you can replace the feedback caps with 0.6V of voltage source. In real life the voltage across the FB caps can be higher or lower than 0.6V. If you get too low voltage then you will get terrible simulated distortion which depends on the model used by the simulator to model the front end transistors.

As far as I remember, those numbers presented by Christophe are true for all listening level SPL (0.0015% at 0.3Vin, 0.002% at 1Vin or more), 1KHz.

I'm agree with you that the bandwidth is too high. Not that it is bad (actually it is good), but we can concentrate to improve other parameters and allow for lower bandwidth as the consequences.

Quote:
Originally Posted by dadod View Post
Yes CCS is for front end, but changing the CCS current the VAS current was changed too.
Technically it doesn't have to be like that. There are many things that affect VAS current, independent of the CCS current to bias the front-end transistor.
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Old 3rd July 2012, 12:08 PM   #2708
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Originally Posted by Jay View Post

Increasing the FB resistors (e.g doubling the resistance with 2K||75R) will also solve the issue.

But all of these will put the circuit in worse stability. This is probably the reason why this topology is not popular, despite its good sound character.
Nice interpretation, I suggested this weeks ago, no need to worry about the stability, it gets affected so little it is of no consequence.

There is no reason for SSA THD figures to be high, I showed my 10 year old design which is the same circuit as having 0.005 distortion at 20khz at 30 Vrms. There are about another 5 or so identical commercial designs using the identical (actually simpler design) all showing THD figures below 0.01.
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Old 3rd July 2012, 12:31 PM   #2709
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Actually I meant stability against oscillation, the hallmark of all high speed circuits.
Well, if your amp has a flat banditch with no peak at the hight end (FB compensation), and no overshoot with square waves (additional input low pass) there will be no stability problem.

Quote:
Originally Posted by Jay View Post
Ah, so it will save the speaker when there is oscillation.
Yes, my protection compare input and output signals after output level has been reduced in dividing-it by the amp gain factor. If any difference (DC, HF or even distortion) it will fire the protection, instant because there is no integration or DC filtering.
In fact, this protection is so sensible that it can fire at each Kick drum on a real loudspeaker (that gives us a good idea about how are working any amp in real world with the current generated byt the moving coil (i dont know how to translate 'force contre electromotrice'). So i have to tune a gap.
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Originally Posted by Jay View Post
Unfortunately he didn't use lateral output. I guess the CSA will use the BIGBT output. But hopefully your amp will outperform the CSA so I don't need to build the CSA
I'm not so sure of that. Listening comparison will tell-it. And, about stability issues, i believe SSA has been tested on several samples, my amp was just tuned as-it (i had it for years before the modification) with *my* old components.

As i said, i published it for educational purpose, and do not encourage people without enough electronic skill to build-it as it. Even the original Crescendo in his VFB original version presented stability issues for several DIYers, while mine was rock stable.
I first builded mine for real, and i made this sim several weeks after. I'm not even so sure components values are exactly the same, My amp in in my enclosures, and i'm too lazy to disassemble -it to look at the real values.
Nothing new here, Murphy said that amps always oscillate and oscillators never start.
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Last edited by Esperado; 3rd July 2012 at 12:38 PM.
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Old 3rd July 2012, 01:13 PM   #2710
dadod is offline dadod  Croatia
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Spice models of the lateral mosfets, which are part of the Esperado's simulation file are completely useless. The gate threshold volatage is to low, and I changed them for Cordell's 2SK134/2SJ49. Not sure for the rest of the models, but for now I used it.
Here is my simulation. I set for 14mA of the VAS current, incremented feedback resistors and it looks that is now more stable with Phase Marin of 60degree and Gain Margin of 20dB.
Decreased power voltage from +-70V to +-50V, I think that two pairs of those lateral are not enough if a load drops to low and +-70V is to much for this amp.
dado
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