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Old 1st July 2011, 02:47 PM   #1
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Question jfet without biasing

I have a strange question:
Somebody tell me that jfet can be used without any biasing in small signal amplifer,so very low noie can obtained.
is it true?
thanks!
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Old 1st July 2011, 03:01 PM   #2
AndrewT is offline AndrewT  Scotland
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The input can bias the jFET to zero Vgs. This requires that the jFET be run at exactly 100% of it's Idss.
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Old 1st July 2011, 03:40 PM   #3
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So what is the advantage and disadvantage of such method?
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Old 1st July 2011, 03:50 PM   #4
h_a is offline h_a  Europe
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You mean no source resistor? Sure that's possible, though only for small signals (forward biasing).

Hannes
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Old 2nd July 2011, 10:36 AM   #5
satoru is offline satoru  United States
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The noise of JFET goes down proportional to the square root of the current. Higher the current, lower the noise. On the other hand, the leakage current goes up significantly higher when the JFET is biased positively. Practically saying, you better limit the positive bias to less than 0.1V to for obtaining negligible amount of leakage current for high gm JFETs. So, in other words, when you have less than 0.1 Vp-p input signal, a zero biased JFET can be used. I have posted a plot of leakage current of positively biased 2SK170 somewhere in the forum. What kind of amplifier are you designing?

Have fun!
satoru
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