Yet another amp - simple inverted with 10x gain, mosfet output stage

[mikelm]

Well, I guess would only ever be a Power I2V converter but I didn't get around to it yet.

I have two amps a loudspeaker to build first.

Have to say purely as a symmetrical amp the SSA captured my imagination.

But ur design did seem most happy when fed with current.

I'll let you know . . .

[sonnya]

I am not going to say anything bad on the SSA.

But i helped one building it (His own design) and i used ~40 hours on it. Before getting it stable.

I am not a fan of it, but it is new thinking and that i like a lot!

[mikelm]

yeah - I'm bumped into that also and didn't fix it yet - that design does "sail close to the wind" but I have the feeling that it will be worth it in the end.

It was the same with my DC linked version of Fetzilla but it came out very nice once I figured it out.

[sonnya]

This is going to turn.

We did get it safe, and the sound from it is true "current feedback" profile.

But you are right: the feedback makes it unsuitable for I2V powerbuffer.

I know that Andrej has it running with only +/-20mV drift. I dont knowwhat he did to make that stable, other thenm adding a cascode stage so that the VAS BJT's was less subjected to delta temperature and therefore a more stable vbe drop which again leeds to a more stable idle current.

Secondly he has degraded the VAS stage with 100K||100K.

I would really like to see some "real life" thd figures from it. But i suspect that with this VAS stage degeneration of ~50K it will be quite high.

Third: his gain is down to 16x where we used 21x

Fourth: his idle current is lower in every stage. Therefore less temp. changes in the BJT's

Without the VAS cascode and VAS degeneration we was down a drift of +/-50mV after adding a current source to the inputstage instead of emitters resistors (He fixed this problem more or less with an 1.5K NTC)

After adding a servo the drift is down to +/-1mV.

For the last version of my circuit (the last one in this thread) i got really low THD above CLASS A level, by adding a buffer stage before the mosfets. And it is 1/5 of the idle current in the mosfets.

This will be send to production next week.
So end next week i will have the PCB's up and running.

What i hope for this design is that i get really low THD of 0.006% just before clipping . But measurements will tell there story of it.

[sonnya]

Updated schematic with buffer.

Per sim it is stable into 8R||10uF.

The bandwidth is hitting 2MHz.

But to be that fast, a perfect layout is very important.

[mikelm]

Thx for the update - I will make ur changes in spice and check it out

[padamiecki]

Originally Posted by kenpeter

Like soOOOo. Or not?

It was interesting what Kenpeter proposed, I tried this and here are the results. Not bad at all... at 180mA idle works well too...

[sonnya]

See the difference to my version. There is 30dB less on second and third harmonic.

[padamiecki]

Originally Posted by sonnya

See the difference to my version. There is 30dB less on second and third harmonic.

hm, you have hf switching hiss. it is -180db down @10MHz
in Kenpeter's proposition there is no HF hiss from >10KHz

but anyway I like you project very much

[sonnya]

Originally Posted by padamiecki

hm, you have hf switching hiss. it is -180db down @10MHz
in Kenpeter's proposition there is no HF hiss from >10KHz

but anyway I like you project very much

My design switches more aprubt than with bipolar.

My gain is 10x higher also