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Old 4th May 2011, 03:30 PM   #31
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You really dislike a bootstrapping arrangement, don't you?
No--at places where it's use is appropriate. In the specific schematic suggested at the beginning of this thread it looks to me (without detailed study) as if the use of the bootstrapping would mostly increase complexity, and gain little.

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Because of the electrolytics and/or old school practice?
Electrolytics are the first thing to fail in a well-designed circuit, so any less is an advantage, basically.

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By the way, below the bias as function of the supply voltage.
Red: CCS
Green: Compensated bootstrap
Which of the two do you prefer?
Looks like an unfair comparison to me. Show us the bias stability of the bootstrapping version without any corrective arrangement. Such could be introduced for the CCS version as well.

BTW, do you know how dependable VA is in production (not a rhetoric question, I have no data on this)?

Samuel
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Old 4th May 2011, 04:05 PM   #32
dadod is offline dadod  Croatia
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Quote:
Originally Posted by Samuel Groner View Post
Wow, a circuit named after me ! As others have pointed out, there's is no reason for this, as it has been around for quite some time--just not with the attention it deserves, so I put it in my little paper.

Regarding replacing the CCSs with a bootstrapping arrangement: we need to carefully look at what actually limits output swing. If the small-signal stages of the amplifier are powered from a filtered/regulated supply which has lower voltage than the supply for the power transistors, the voltage swing limit will usually stem from the second stage, not the output buffer. In this case there is little reason to not just use CCSs.

Samuel
I called it that way to get some attention on that schematic. If there is not well known participant beyond the tread no one pays attention.
dado
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Old 4th May 2011, 04:20 PM   #33
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Quote:
Originally Posted by Samuel Groner View Post
No--at places where it's use is appropriate. In the specific schematic suggested at the beginning of this thread it looks to me (without detailed study) as if the use of the bootstrapping would mostly increase complexity, and gain little.
Compared to a CCS, a bootstrap isn't that complex: 2R's and 1 C.

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Electrolytics are the first thing to fail in a well-designed circuit, so any less is an advantage, basically.
True, but in every amp you will need some electrolitics anyhow. So two more of them has little effect on the overall reliability.

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Looks like an unfair comparison to me. Show us the bias stability of the bootstrapping version without any corrective arrangement. Such could be introduced for the CCS version as well.
I showed the compensated bootstrap as an answer on Dado's remark:
"although this might result in somewhat reduced bias stability with unregulated power supplies."
Of course you also can apply some form of compensation on a CCS.

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BTW, do you know how dependable VA is in production (not a rhetoric question, I have no data on this)?
Samuel
I don't have exact data. I guess VA will vary as much as beta will. For a given process, VA * beta seems to be constant.
Anyhow, no matter which method is used (a CCS or a bootstrap), in both cases the Early effect will affect the bias stability (that is, with an unregulated PSU).

Cheers,
E.
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Old 4th May 2011, 04:57 PM   #34
dadod is offline dadod  Croatia
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Quote:
Originally Posted by Edmond Stuart View Post

I showed the compensated bootstrap as an answer on Dado's remark:
"although this might result in somewhat reduced bias stability with unregulated power supplies."
E.
That remark was taken from Groner text on that Triple.
So I changed one resistor with CCS(one MOFET and one resistor). In this case a bootstrap is 2 R's 1 C and 1 FET.
dado
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Old 5th May 2011, 02:39 AM   #35
PB2 is offline PB2  United States
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Have you simulated with 4 and 2 ohm loads - if you plan to go that low?
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Old 5th May 2011, 08:38 AM   #36
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Originally Posted by PB2 View Post
Have you simulated with 4 and 2 ohm loads - if you plan to go that low?
I am not sure what you want to simulate.
Distortion on 2ohm is still very low.
1kHz 0.000045%
20kHz 0.001604%

Attached is LTspice zip file with sinus and square simulation, and you can try to test what is of your interest and show the result and comments.
dado
Attached Files
File Type: zip Groner-TRIPLE.zip (15.8 KB, 49 views)
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Old 5th May 2011, 09:06 AM   #37
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Hi dado,

Maybe it's of no concern, but did you have a look at the effect of temperature of the CCS FETs on the OPS bias?

Cheers,
E.
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Old 5th May 2011, 09:16 AM   #38
dadod is offline dadod  Croatia
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Quote:
Originally Posted by Edmond Stuart View Post
Hi dado,

Maybe it's of no concern, but did you have a look at the effect of temperature of the CCS FETs on the OPS bias?

Cheers,
E.
Problem with my simulation is use of standard NJFET from LTspice library. I tried to use Supertex model(DN3135 or DN2540) but LTspice does not recognize it.
With a wrong model I don't see usefulness of temperature simulation. Do you know how to find Supetex spice models that LTspice can use?
dado
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Old 5th May 2011, 10:55 AM   #39
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Quote:
Originally Posted by dadod View Post
Problem with my simulation is use of standard NJFET from LTspice library. I tried to use Supertex model(DN3135 or DN2540) but LTspice does not recognize it.
As for the DN3135, the maximum temp. coef. of Vgs is 4.5mV/K.
So it's quite easy to simulate temperature effects. Just insert a (small) voltage source in front of the gate.

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With a wrong model I don't see usefulness of temperature simulation. Do you know how to find Supetex spice models that LTspice can use?
dado
Sorry, I don't know (I'm using another simulator)

Cheers,
E.
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