Does this design require selected JFETs?

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SY said:
Guys, I'd really appreciate it if you'd stick to the technical issues and cut out the sniping. The technical portions are interesting and well-argued. The sniping back-and-forth is silly and childish.
:cop:
Hi Sy,
I don't feel the technical issues are interesting and already well treated by John Curl.
The sniping about a non-excistant technical isssue is why I am out.

:bigeyes:
 
(mostly) peace Charles

I thought I was displaying my technical “point” about the bias openly and certainly didn’t expect anyone skewer themselves with it, I can’t fault anyone for missing the bias detail on a first pass look at the schematic since I clearly overlooked it in my first post even with the too large current source value central to my criticism

Suggesting tossing the fets is exactly the sort of witticism I would use or expect to receive in pointing out the bias error between engineers (not to mention a few lunch time asides like: “no he’s not Biased, <pause> …or at least not Reverse biased”)

I would expect other electronic engineers or technicians to quickly pick up the error and move on, however I can’t recommend the circuit to a hobbyist at Greylord’s level (apologies if I’m assuming to much from your question about current measurement)

The circuit clearly needs more engineering to work at all, much less at all well

I would genuinely like to hear an explanation by an experienced discrete jfet design practitioner on the technical reasons for the perceived audible superiority and how to handle the huge device variability and 2 dimensional matching requirements to get repeatably superior results. Borbley just scratches the surface of what I would like to know and doesn’t really go beyond the National and Siliconix app notes I read 25 yrs ago

So how about some really technical audio design contributions from “real experts”*


* least anyone think I’m being too generous (or am over medicated) – rest assured that the phrase “p*r*i*c*k*l*y Prima Donna” was muttered occasionally while composing this post and not just with Charles’ overreaction in mind
[no I don't mean to emphasize the four letter word, which is not the root meaning of this word; I just refuse to let stupid filter software spoil my alliteration]
 
jcx said:
For all of the circuit symmetry the design is very “unbalanced” in a engineering design sense:

Low noise fets with hot bias current of 15 mA, noise potential is wasted by 650 Ohm output resistance thermal noise (and some fets will not even have Idss of 15 mA)

1:1 current mirrors waste current and just copy supply noise rather than reduce it in the fet bias current sources

Complemetary fets are not in fact symmetrical enough for any reasonable distortion cancellation - real improvements would be cascoding fets and linearizing output

Bipolar output bias is a function of the sum of 6 different voltages, the 2 fet Vgs being the most variable by device, the output bias has no trim provision

With little clue to intended output stage bias and load it is possible that the bipolar transistors will dominate the distortion (or at least add odd harmonics) which would again seem to not fit philosophically with the rest

Hello JCX -

Thanks for the nice query. I'm actually quoting your previous post, as that has the most relevant questions. Here is my take on what the appropriate answers are:

1) If this were a mic preamp or a phono preamp, this might be a valid criticism. Since it is a unity-gain buffer, it is safe to assume that the noise contribution from a 650 ohm resistors is negligible.

2a) I don't think the idea of "wasting" 15 mA of current in a current mirror is pertinent, except in the case of battery-operated equipment.

2b) The current mirror won't "copy supply noise". The reference current for the mirror comes from ground. Any fluctuations on the rail are common to both "halves" of the current mirror and will tend to be rejected.

3a) Complementary FETs are, in fact, close enough complements to get good distortion reduction.

3b) You can't cascode the FETs, because they are followers. I'm not sure what you mean by "linearizing the outputs".

4) The biggest variable in the output stage bias will be the variability in Vgs in the FETs. Even this will not be too big, as the specified Toshiba FETs are pre-sorted by Idss. However, by using 100 ohm emitter resistors for the outputs, any variability is minimized. While there still will be some minor variation in output bias from sample to sample, I don't think this will be an issue in real life. If one were worried about it, you could either match FETs or change the 750 ohm resistors in the current sources to trimpots.

5) The output bias will be roughly 10 mA. This means that the output stage can drive a short circuit (through the 650 output resistor) and still stay in class A up to 24 V P-P. This almost to clipping, so I think there isn't really a problem here.

In your later post you asked "why FETs"? One advantage is it's about the only safe way to avoid the requirement for an input coupling cap. Another advantage is much greater linearity at RF frequencies. This helps avoid sonic nasties from the real world, where we are bathed in RF from scores of sources. Jocko has done some measurements in this regard, although he may not want to share them.

The bottom line is that they sound good. Most people don't use them simply because they don't understand them.

Best regards,
Charles Hansen
 
Jocko, who just has to be different, uses BJTs in his designs.

And then has to take steps to reduce the minute overshoot problems.

Yeah, one of the few palces that I do not use JFETs in a low-level circuit. Sometimes I wonder why.

Then I remember how I can play games with the bias in the final stage easier without screwing up the offset.

Jocko
 
diyAudio Retiree
Joined 2002
Jfet is a four letter word

I must profess to be another "Mosfet and Jfets sound better" advocate. Biasing and matching really a non issue for one off and small quantity circuits. The Toshiba output stage BJTs are great but I will generally stick to fets in general. even for current sources and cascodes. Almost all the reported better sounding op amps have Jfet inputs. You will see a very definite trend to the use of Jfet and Mosfet front ends in lot of amplifier designs. The increased immunity to RF intermod is what attracted me to them from a design point as well as the better sound. RFs effects on audio circuits is one of the most important influences to how they sound and is one of the least understood factors by most audio designers. It is also the most lied about aspect of audio cable design.

I believe p*r*i*c*k*l*y is actually based on a five letter word. I have no idea what a Prima Donna is since I am known for my easy going conformity to the desires of the group and the term has never come up.......... Get off the floor and settle down before you hurt yourself Jocko!

Fred (another four letter word)
 
Hi JCX,

first of all nice to see you back Fred although I do not confirm to a lot of your opinions. But maybe that becomes from the way we realise our audio equipment. Most often there is more than one way to get the desired result.

JCX you asked why FETs sounds superior to BJT. Well, look to nearly every implemenented amp design. You see BJTs most often, first of all they are cheap, second some BJT parameters vary only a very bit. This makes designs stable and rugged to parameter stray. FET design off chip is more difficult than on chip. Of course this has nothing to do with audible differences between BJT and JFET/MOSFET.

Ask yourself why do you need an open loop gain of about 100db. Most topologies do so. I can't see any reason for it in audio circuits. Try to lower open loog gain. Not only with local feedback, lowering topology gain is better. BJTs have more gain than FETs...

Intelligent use of BJTs AND FETs is the way to superior sound. Use as less as possible parts in the signal path. My designs only have a single amplification stage and only 3 (preamps) to 5 (power-amps) components in the signal path. Compare this to what you see in most commercial designs. And compare again to what tubes do. To my experience you can't do this, if you are only using BJTs or FETs. Combine them in the most intelligent way.

Yes, RF immunity is important, very important, use RF Filters, although they are inside the signal path. That's it.:cool:
 
How about this

1) Add a trimpot across R2 to adjust for DC offset and remove coupling capacitor.

2) Replace R10 and R11 with 4ma current diodes.

3) Attach fet drains to junction of output transistors and 100ohm resistors.

Would this give better performance and solve some of Greyhorse's problems?

Regards,
Jam
 
Oh! Oh! Steve is in trouble......

Here is one for you Steve. :D :D :D
 

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jam said:
How about this

1) Add a trimpot across R2 to adjust for DC offset and remove coupling capacitor.

2) Replace R10 and R11 with 4ma current diodes.

3) Attach fet drains to junction of output transistors and 100ohm resistors.

Would this give better performance and solve some of Greyhorse's problems?

Regards,
Jam

Hello Jam -

It won't work as you described. Build it and see why not. (Here's a hint -- it will probably work OK if you simulate it.)

Charles Hansen
 
Hello Jam -

I don't know too many Levinson topologies except for the one they stole from Sansui's 1981 AES paper on biasing class B output stages. But it still won't work as desired. Build it and see what kind of problems it has. It's such a simple circuit that you could breadboard it in 15 minutes. You'll learn a lot by doing so.

Best regards,
Charles Hansen
 
jam said:
How about this
1) Add a trimpot across R2 to adjust for DC offset and remove coupling capacitor.
Trimming DC offset this way, you’ll also “trim” the bias through (and only through) J1. IMHO it is better to give up of the effort to get rid of the output cap.


jam said:
3) Attach fet drains to junction of output transistors and 100ohm resistors.
This probably will work, but what’s the goal?


Charles Hansen said:
You can't cascode the FETs, because they are followers.
Of course you can cascode the follower.


Pedja
 
Pedja said:

Of course you can cascode the follower.

Hello -

Maybe I'm being especially dense this morning, but I'm not sure how to cascode a follower. A cascode is defined as a common source stage driving a common grid stage (referring to FETs, of course), and normally works to keep a constant voltage across the first device. The main goal of a cascode is to eliminate the Miller capacitance to increase the bandwidth. I suppose one might be able to hook up a bootstrap around a follower to keep a constant voltage across it, and one might even call such a circuit a "cascode", but what exactly would be the point? (The source follower doesn't suffer from the Miller effect.)

Thanks,
Charles Hansen
 
I suppose one might be able to hook up a bootstrap around a follower to keep a constant voltage across it, and one might even call such a circuit a "cascode", but what exactly would be the point?

Charles, that's exactly what Nelson Pass called it in years past. IIRC, he abjured the use in an output stage, claiming that it restricted dynamics, or something like that. I'm not near my literature box and I'm no expert on SS, but theoretical advantages might be PS rejection and reduced Early effect.
 
Thanks Charles, everyone;

It looks like this is going in a better direction now.

Without the specific application context, we certainly can’t say if the buffer circuit topology under discussion is good enough or even remotely appropriate for the job but it certainly can be improved – in the sense of better measurable performance in areas we believe impact audible perceived performance.


I don’t know how to make my current source comment more clear, Q2,4 collector currents are set by the +,-Vcc1 to gnd voltages, any +,-Vcc1 variations with respect to gnd are reflected in the respective bias current source output current. Most high quality current sources use voltage references of some type to keep the output current independent of the supply, perhaps the designer has decided the effort he spent on regulating the supply means it can be considered perfect.

[sorry if some of this sounds repetitive now but I was busy, composed message before recent posts]

Cascoding is perhaps too specific a term, bootstrapping the input fet drains (which can be done with a “cascode” circuit) is my real suggestion here. This is commonly done in fet buffer circuits to boost the already high input impedance, other than electret/condenser mic buffers, there is little need for the available input impedance improvement with most audio sources. The indirect advantage that may be relevant is nearly eliminating the input transistor power variation and its properties’ thermal variations. Trying the numbers, you will find several degree C transistor die temp variation is likely without bootstrapping which can be responsible for mV level offset voltage modulation with low frequency audio signals – yes I know fets can be biased for a nominal 0 TC, and that there can be TC cancellation with the complementary input stage but I haven’t seen any audio designer explain that they have engineered in these cancellations and verified them over production ( consider different die sizes for n vs P fets, different Id to match Vgs or gfs or TC or 2nd order derivative matching; I don’t think your going to get them all)

The bipolar output stage buffer nonlinearities include Vbe modulation with output current and Hfe variation with output voltage and current as well as thermal modulations of these. A Pass style output cascode greatly reduces both the Early voltage component of the Hfe variation and the thermal modulation, selecting high voltage output transistors gives very flat Hfe with output current variation, linearizing the output transistor base current flowing in the fet source impedance. The complementary output with degeneration certainly seems be all that can done for Vbe modulation without feedback (unless something like Gilbert’s multi-tanh linearization or other cancellation scheme could be used) Some “no global feedback” people seem to accept the Sziklia feedback pair which can reduce the several percent distortion from the emitter follower to 0.1% levels and has high input impedance.

These effects are small, but so are the artifacts introduced by informed use of negative feedback, when did a “golden ear” audiophile ever accept an engineer’s argument that an effect was too small to be heard? (or that the minute problem du jour couldn’t be heard through the masking of say 3% SET amplifier or loudspeaker distortion)

As a precision instrumentation designer I do know where to find treatments of some of these analog design details scattered throughout the electronics and scientific literature but I seldom find audio design articles that convince me that many audio designers are using “error budget” analysis and certainly not extending the analysis into the dynamic domain to the state of the art - which has been moved forward in the last decade by ADSL and telecom chip designers who can offer -90 dB distortion from an op amp driving <50 Ohm loads at >1MHz Certainly we can’t expect to see much detail on this forum, but I would like to see some of the > 30 yr old audio design bromides so often set forth here reexamined, explained and/or updated in the literature
 
Hello JCX,

I would agree with nearly all of your analysis from a technical standpoint. At the same time, my personal experience is that often the added complexity that results in improved measured performance will not result in improved audible performance. Now, I haven't tried everything, so it's certainly possible that I'm overlooking some potential gains. But that is why there are so many designers and so many designs out there. There isn't one "perfect" design (contrary to D. Self's apparent opinion).

One of my mentors (who posts here sometimes as jon marsh) would drive this point home to me very clearly when I was beginning in SS design. I would ask him "why did you do it this way?" or "why don't you do it that way?". His standard reply was "that's a valid approach, and it's not the one I've chosen. Why don't you build it up yourself and see how well it works?". Sound advice indeed!

And so maybe "cascoding" the output stage emitter followers would make an improvement, and maybe not. As SY pointed out, Nelson Pass used that approach in the past and has long since discarded it. Maybe it has some inherent problem. Or maybe NP just didn't implement it properly. The only way to find out is to spend a lot of time on the test bench building circuits, and a lot of time in the sound room evaluating them. My hat's off to anyone that spends the time to do both.

By the way, Ed Oxner of Siliconix has written a couple of excellent (but very hard to find) books on FETs. He walks through the steps to find the zero tempco point of a JFET (it doesn't work with all of them). I tried it with the Toshiba 2SJ103 and 2SK246, and it works extremely well. Bias them at 0.3 mA, and they are rock solid, both polarities. You can stick them on a curve tracer and hit them with either freeze spray or hot air, and the curve stays steady. Now 0.3 mA of bias has its own set of problems, so I never use this for audio stages, but it does come in handy for making current sources with a zero tempco.

Best regards,
Charles Hansen
 
Well folks, I mostly agree with Charles, but jcox makes some very good points. Personally, I think that the ORIGINAL follower design is fundamentally wrong, because it does not naturally follow the characteristics of the devices used. This does not make it a bad design, or that it might even have some qualities that we might find important. Still, a comp j-fet driving a comp transistor output in a Darlington type configuration would work as well, and use less that 1/2 the parts.
The type of circuit originally posted works really well with all bipolar transistors. After all, it removes the need to add bias diodes, etc, to the input. When you use j-fets instead, you create a need to bias the j-fet which means adding led's. This is unnecessary, if you just invert the polarity of the fets and make a comp j-fet input follower driving a transistor pair. It can be done. Then the current sources are unnecessary, led's, etc.
For the record, many complementary j-fets have been made to match each other, especially with Gm. The trade-off is extra capacitance on the p-channel device. I hope that this helps.
 
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