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Old 3rd April 2011, 08:53 PM   #21
MiiB is online now MiiB  Denmark
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But also to keep the spread.. so that voltage don't drop during transients...
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Old 3rd April 2011, 09:01 PM   #22
DF96 is offline DF96  England
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Sustained LF signals can drop the voltage more than HF transients. An LF half-cycle can take up the whole time between charging pulses, but even a sustained HF sine wave uses less than half the charge. As I said, the PSU caps need to be big enough to avoid too much voltage droop.
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Old 3rd April 2011, 09:07 PM   #23
MiiB is online now MiiB  Denmark
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Else the signal will modulate them...So they are part of the signal path...size and ESR matters...
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Old 3rd April 2011, 09:16 PM   #24
DF96 is offline DF96  England
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Provided there is adequate PSRR and feedback, and provided that there remains sufficient supply voltage to cover the signal voltage then no. With inadequate PSRR, and insufficient feedback, then power supply variations can end up in the load but this shows poor design. As I said, the concept of signal path is not always helpful as it seems to lead people astray.
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Old 3rd April 2011, 09:33 PM   #25
Bigun is offline Bigun  Canada
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Exactly, and so for Class A where we often have the option not to employ global feedback we do have to consider the caps in the psu.
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Old 3rd April 2011, 09:47 PM   #26
DF96 is offline DF96  England
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Yes, I guess you could deliberately design the PSU caps into the signal path if that is what you want to do.
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Old 3rd April 2011, 11:36 PM   #27
Bigun is offline Bigun  Canada
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you have misunderstood me - your post no.24 accurately points out that good PSRR and feedback (often the good PSRR comes from use of nfb) removes a lot of the influence of the power supply caps from the current that flows through the load. All I am saying is that with simple Class A you often have very poor PSRR and often no feedback (except degeneration perhaps) and therefore, the power supply caps may be more relevant.
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Last edited by Bigun; 3rd April 2011 at 11:42 PM.
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Old 4th April 2011, 12:18 AM   #28
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It's on the data sheet, quiescent device current, IDD max at 25C.

Typical values are listed as 0.01A. Furthermore, the
IDD spec is for all six inverters in parallel (see fig.15).

At best we have a class AB amplifier with a bias of 0.01A, so if he is really drawing no output current (less than 0.01A) then it might be class A.
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Old 4th April 2011, 09:26 AM   #29
DF96 is offline DF96  England
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Sorry, I was allowing my prejudice against zero feedback SE Class A to show through in my remarks. I regard such a circuit as OK for a 50-year old wireless set, but not for my hi-fi. When designing for music reproduction one of the aims should be to ensure that PSU caps are not in the signal path, although I realise that not everyone sees things that way.
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Old 4th April 2011, 09:29 AM   #30
Elvee is offline Elvee  Belgium
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Quote:
Originally Posted by djk View Post
It's on the data sheet, quiescent device current, IDD max at 25C.

Typical values are listed as 0.01A. Furthermore, the
IDD spec is for all six inverters in parallel (see fig.15).

At best we have a class AB amplifier with a bias of 0.01A, so if he is really drawing no output current (less than 0.01A) then it might be class A.
You seem totally unfamiliar with the CMOS family, especially when used in linear mode.
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