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Old 12th March 2011, 09:41 PM   #31
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actually the impedances inside the loop can be quite high, even in a closed loop. the impedance of a VAS is still quite high (unless the feedback is sampled at the VAS, then the impedance would be low). between the VAS and output (where the feedback is sampled from) you have buffer amps, and the load impedance seen by the high impedance VAS is the output impedance times the output device betas (including any pre-drver and driver stages. let's say we have a VAS with a 20k output impedance and it's in an amp with a closed loop. the output impedance of the amp is 0.01 ohms. there are 3 EF stages between the VAS and output terminal. the beta of the predriver transistors is 200, the driver beta is 100 and the output devices 50. the impedance "reflected" to the VAS is 200x100x50x0.01 or 10k. the action of feedback would make the amp do whatever is required to maintain equilibrium at the inputs, so the VAS would be driven harder to make up the difference. this in effect seems to lower the impedance of the VAS, until the VAS reaches it's physical limitations, and the loading of the VAS begins to have side effects.
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Old 12th March 2011, 10:38 PM   #32
AKSA is offline AKSA  Australia
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The problem is this: PP AB output stages have highly variable input impedance owing to device switching transitions.

With lots of global fb, the VAS papers over these cracks, but wherever correction is strong there is inevitably more distortion.

As Arturo says, a buffer on the VAS will soften the worst effects of these wild impedance changes.

Technically, there is no argument that a buffer on the VAS is a GOOD thing.

But you have to build and listen to it. Sometimes you find that what is better technically sounds bad. And I've noticed that what sounds bad to one guy, often sounds bad to another. Over a sample of ten listeners, you can often reach consensus.

I favor Class A SE buffers for the VAS since the distortions introduced are mostly even order.

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Old 12th March 2011, 10:39 PM   #33
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Current source, sink, and bandwidth are all important.
Impedance in the middle of a closed loop is irrelevant.
No matter what might happen open, its forced low.

My point was that the "buffer" presented here could
only source+sink half as much current swing as VAS.

Sure, loaded VAS might now run into trouble. But that
lame buffer would have run to the same trouble twice
as early.
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Old 13th March 2011, 10:03 AM   #34
lineup is offline lineup  Sweden
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Default ALL BJT Example

This example uses BJT. (Except output stage.)
Gain 2, output 4 Vpeak.
Input runs 2 mA and VAS passes 3 mA.

THD 0.00015 %
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Old 13th March 2011, 03:59 PM   #35
lineup is offline lineup  Sweden
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Same as previous BJT, but push-pull Class A output.

THD is only 0.000086%
with 2nd at -127dB.
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Old 13th March 2011, 06:16 PM   #36
MiiB is offline MiiB  Denmark
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Hi

if you do the output stage with lateral mosfets you can skip the VBE multiplier and create the bias with a simple resistor as biasspreader network...

Last edited by MiiB; 13th March 2011 at 06:18 PM.
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Old 14th March 2011, 12:02 AM   #37
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Quote:
Originally Posted by MiiB View Post
Hi

if you do the output stage with lateral mosfets you can skip the VBE multiplier and create the bias with a simple resistor as biasspreader network...
You could fix the spread across Lineup's R20+R21 bias resistors by returning
current to his VAS stage. In my oddball example you also see a 15K on the
flipside of the VAS to balance against those same bias correcting currents.

Yeah, theres a whole lot more strange going on here. But the bias is all
I really wanted to show. The rest may not be relevant to this thread.

Anyways, takes hot output devices completely out of the bias equation.
Lineup's output introduces two hot emitter drops of uncertainty after the
bias spreader. Probably not a big deal, I'm just making conversation...
At 5.6mA (.12W), nothing about Lineup's circuit is going to get especially
hot anyway...

As you beef up that output, or add EFs, it might become relevant...

For purpose of this thread, ignore my Class B Schottkys and pretend they
are Lineup's Class A resistors.
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Last edited by kenpeter; 14th March 2011 at 12:31 AM.
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Old 14th March 2011, 12:56 AM   #38
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This bias scheme doesn't make a whole lot of sense at such low current.
I would not normally have needed 100R resistors. I'm just showing how
you can use cold transistors to regulate bias, and not let a hot output
device make that decision.

---oops---

Drew Q2 PNP upside down, strange the sim still worked fine that way...
I thought VBE was supposed to avalanche like a Zenier around 5V???
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Last edited by kenpeter; 14th March 2011 at 01:04 AM.
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Old 14th March 2011, 02:31 AM   #39
WuYit is offline WuYit  Sweden
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Quote:
theres a whole lot more strange going on here.
Yes.
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Old 14th March 2011, 09:09 AM   #40
lineup is offline lineup  Sweden
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The test SPICE does not show anything strange in circuits I published.
On the contrary it shows very good figures regarding distortion.
I can not answer for modified circuits published by other
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