Can I have some help with my class A amplifier design? - diyAudio
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Old 10th February 2011, 11:25 AM   #1
GregH2 is offline GregH2  Australia
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Default Can I have some help with my class A amplifier design?

Hello all,

Please be gentle, my electronic knowledge is barely above high school level

Having built a pass clone and JLH I'm now trying to build a simple 2 stage mosfet class A amplifier of my own design. It will hopefully have a source follower output stage and a buffering and voltage amplifying input stage (common source). And for the fun of it I am trying to avoid global feedback, but I will add it if necessary.

This is my first attempt at designing anything myself and I have blatantly stolen Nelson Pass' Zen amplifier current source so I'm not claiming to be original.

I am trying to model the thing in LTSpice and you can see the model attached. Please note that the irf510s will not be used in practice - I will try to find something more suited to the job. These were all I could find in the standard LT spice parts library. Also the resistors on the input will be pots for adjustment of the operating point.

Anyway, I guess the first thing to ask is can you spot anything that is a glaring omission or circuit shortfall? Is this project worth following through or am I wasting my time?

Now for my main question. The problem I am having is that because the input fet is current sourced it has an extremely high gain and I get full voltage swing with only a few tenths of a volt input. Is there anything I can do to get around this, apart from add an impractically large source resistor, or is this just never going to work?

Any advice regarding the circuit design in general would be appreciated.

Greg.
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Old 10th February 2011, 11:55 AM   #2
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From your drawing, I'm assuming you're running this from a single rail of 56 Volts.
This means you're expecting to get a peak output voltage of something around 24 Volts.
Across an 8R load tht's a peak current of 3 Amps.
As it's not pushpull but fed from a current source then your standing current is also 3 Amps.
This means your total dissipation between the two output devices is 168 Watts.
Are the devices capable of this?, and you're going to have to have lots of heat sinking. Also you are going to have to make sure the output is stable at half the rail volts otherwise one output device will be dissipating rather more power......early demise....

Regards
Henry
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Old 10th February 2011, 12:13 PM   #3
GregH2 is offline GregH2  Australia
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Thanks Henry.

You're quite correct in your interpretation. The schematic is a proof of concept. I intend to use multiple output fets in parallel and drop the quiescent current through each one to an amp or so. The fets will be paralleled as per the Aleph design and the source sense resistor will be increased accordingly. In any case output current and PS voltage need some tweaking for the final design. I'm just trying to get the concept sorted.

Any suggestions regarding keeping the output stable at 1/2 the supply voltage? I had rather hoped adjusting the bias pot at the input would be sufficient.
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Old 10th February 2011, 12:31 PM   #4
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Some kind of DC feedback path with a cap to remove the audio and a trim pot to get it just right?
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Old 10th February 2011, 08:36 PM   #5
GregH2 is offline GregH2  Australia
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Quote:
Originally Posted by toprepairman View Post
Some kind of DC feedback path with a cap to remove the audio and a trim pot to get it just right?
Any suggestions on how I might implement this?

The attached image is more what I was intending for the output stage to handle the 56v V+. Guess I should have posted a full schematic initially. I wasn't concerned with that part of the circuit.
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Old 11th February 2011, 07:33 AM   #6
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Hmmmm, now you're asking, Lol.
First you need to have some idea of the correct bias voltage for the input Fet. Then take a resistive voltage divider from the output to ground to give you a similar voltage to bias. Include a trimmer in the ground end to adjust the divided output. Decouple your divide volts with a suitable cap, say 220uF, then feed this via a 47K resistor to the input Fet gate.
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Old 11th February 2011, 09:18 AM   #7
AndrewT is offline AndrewT  Scotland
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I think you should disconnect the input from the bias string R3/4.
Connect the input to the bias string via a large value resistor.
Decouple the bias voltage to signal ground.

1k0 for output gate stoppers is unusually high.

Do you realise that if you return the speaker to V1 you get a constant current draw on your power supply?

If M2 as a CCS load gives too high first stage gain then consider replacing it with a resistor load. And to further reduce the gain (if still lower is needed) increase the degeneration resistor.
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Old 11th February 2011, 11:03 AM   #8
GregH2 is offline GregH2  Australia
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Quote:
Originally Posted by toprepairman View Post
Hmmmm, now you're asking, Lol.
First you need to have some idea of the correct bias voltage for the input Fet. Then take a resistive voltage divider from the output to ground to give you a similar voltage to bias. Include a trimmer in the ground end to adjust the divided output. Decouple your divide volts with a suitable cap, say 220uF, then feed this via a 47K resistor to the input Fet gate.

Ha, amazing. I thought this would be far too simple a solution but I modelled it and it works perfectly. Thanks for such an elegant solution. It allows me to pretty much remove the bias controls from the front of the amplifier too (see revised circuit). Any other suggestions Henry?
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Old 11th February 2011, 11:08 AM   #9
GregH2 is offline GregH2  Australia
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Quote:
Originally Posted by AndrewT View Post
I think you should disconnect the input from the bias string R3/4.
Connect the input to the bias string via a large value resistor.
Decouple the bias voltage to signal ground.

1k0 for output gate stoppers is unusually high.

Do you realise that if you return the speaker to V1 you get a constant current draw on your power supply?

If M2 as a CCS load gives too high first stage gain then consider replacing it with a resistor load. And to further reduce the gain (if still lower is needed) increase the degeneration resistor.
1) I'm guessing the bias decoupling is no longer needed with revised version (see above post)? Got a lot of resistance between the bias source and the input now.

2) Yes, you're right about the gate stoppers. Dropped them to 221R now.

3) The idea to connect the speaker to v+ was a revelation. Thank you. Power supply will thank you too.

4) I'm hoping if I switch to a fet with lower transconductance things will improve somewhat. Trying a few things before I abandon the CCS idea.

Thanks,

Greg.
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Old 11th February 2011, 12:10 PM   #10
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I'd reduce the values of R5 and R17 to a much lower value so C7 gets to it's operating voltage much sooner, 2k/680R would be fine.
Can't see there's any advantage to connecting your speaker to the supply, you just end up with 56 volts DC on your speaker - an accident waiting to happen.
If you don't mind the speaker floating above ground then you could coonect it to the output and then to two big caps, one to supply and one to ground. That would lessen the amount of switch-on thump.

Regards
Henry
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