How to choose JFET operating mode ?

[gurevise]

Hi guys,
I'm trying to figure out how to choose optimal JFET operating mode.
JFET (2SK170) will be used as a lower element of cascode circuit with tube sitting above it.

What I'm looking for is what the operating mode/point which would make JFET operate in more linear fashion. Or whether lower/higher voltage/current would make it more quiet.

Is it lower / higher drain / source voltage?
Is it lower / higher current ?

Are there any guidelines there ?

Any input will be very appreciated.

Thanks
Sergey

[AndrewT]

Hi,
the k170 jFET has low Vds and low Id limits.
It also has a Pd limit.
I'd suggest you design to use no more than 50% of the Vds limit and no more than 50% of the Pd limit.

These two restrictions put your jFET into a narrow band of operational conditions.

Since there is a cascode, are we to assume this is a stage with gain, rather than a buffer with gain ~+0dB?

A further guide is that most builders bias their jFET to pass between 30% and 70% of it's Idss.
You can go outside this popular range, possibly as far as 10% to 100% of Idss.

Look at the last graph: excess gate current vs Vds the gate current becomes excessive when Vds or Vdg >20V
Experienced designers (Curl and others) have said that a 12 to 14Vds limit be placed on the device to limit the excess gate current.

Read Pass, Borbely and Jung.
If his threads were not so enormous I would add Curl to the reading list, but!

[MRupp]

It certainly depends on the circuit overall and also on the input signal level, but the K170 is most linear close to its Idss rating, unlike some of the lower gm JFets for which the 30-60% Idss range may be ok. Vds should not be too low, at least 6-8 Volts or above (though Borbely cascodes them with 1-2 Volts).