First stumbling steps in Solid State

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Hello,

I'm currently working towards understanding more about amplifiers and in that quest I have a working amplifier running, but it's far from ideal and I'm constantly seeking to improve/learn.

My amplifier at this stage basically consists of an opamp circuit playing into a push-pull bjt output stage. The problem here is that the opamps output is a theoretical maximum of about +-15v(+-18v rails), giving me a maximum output of the push-pull stage less than that.

As I'm running +-40v rails on the output stage I'm nowhere near driving it fully, so I think the next step is to insert a stage inbetween the opamp and the output stage. This will hopefully get the output power somewhat up.(Not that I lack power at this stage, for normal listening it's still fine).

I wish to learn about different amplifier topologies and what they can do for me, as well as building in stages as I go. I'm also running about everything in LTSpice to experiment some.

Currently I'm using MJE3055/MJE2955 and TIP3055/TIP2955 transistors in the outputstage, mostly due to price and availability. I'm also using this amplifier for a subwoofer, so they only need to deal with low frequencies.

Pictures of the current setup:

An externally hosted image should be here but it was not working when we last tested it.


An externally hosted image should be here but it was not working when we last tested it.



Image of an earlier incarnation of the amp:

An externally hosted image should be here but it was not working when we last tested it.


(Yes, this is running on breadboards atm, hardly an ideal situation, but still haven't burned the house down or anything :hot:)

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Kolbjørn
 
I've been reading alot lately, more specifically I've been reading Audio Power Amplifier Design Handbook(Douglas Self), Designing Audio Power Amplifiers(Bob Cordell) and High-Power Audio Amplifier Construction Manual(G. Randy Slone).

I think I'm getting to grasp the concepts of an amplifier, the common buildingblocks(LTP, VAS, OPS) and their usage. I have rethought a few things though, most importantly I've decided to do smaller steps, meaning I don't get to tackle a monster amplifier with dual LTPs, multiple parallel drivers and high voltages just yet.

I've decided to start with a headphone amp, mostly because the C-Moy I'm currently using tends to overheat. Why it's overheating? It's either having problems with the load or oscillating, or both, not that it matters for this project.


This is the circuit I've put together:

An externally hosted image should be here but it was not working when we last tested it.



It's pretty basic, I've used common transistors(2n3904/06/bc139/140) mostly because I got loads of them, they are cheap and according to ltspice they should suffice. Please let me know if this is a problem.

The LTP is nothing special, we have a CCS(Q14/Q15) feeding the differential pair and ending up in Q8 and Q11. I still haven't grasped the formula for gain in a LTP, I might have missed it in a book though.

The VAS is just a single transistor(Q6), I did not go for a darlington VAS because ltspice said it made no difference.

The OPS-bias is controlled by Q3, a 100 Ohm potmeter(RTrim) is hooked up as a rheostat and boxed in by R3 and R4, giving us a limited range of bias-current(harder to overload the OPS by accident).

The OPS is a basic darlington EF-stage, I have used MJE3055/2955 for the simulation, planning to perhaps use BD139/BD140 in the real circuit.

I'm running all this from a +-17v(unloaded, trafo is a 12vct/2A) powersupply, I predict the supply is going to sag a tad under load, no major worries though.

Closed Loop gain is 11, maximum input voltage before clipping is about 1.35v, which gives a simulated 3.5W in 32 Ohm with 0.006928% THD. At 1% THD we are looking at 3.8W and at 10% 4.7W, but who in their right mind would enjoy 10% THD, and what headphones are you using that requires 4.7W?

At a more normal input voltage(+-0.7v) the output is about 900mW, which I suspect is still way over the top for most headphones.


Phew, this was a lengthy post, if you have any comments, hints or anything else, don't hold back, this is very much a learning process for me, I learn as I go.

(Please note that every value presented in this post is based on an ltspice simulation and may or may not differ from reality.)

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Kolbjørn
 
Hello , coolbeer (I want one :) ) .. Yeah , go with post 5. Transistors go better with big transistors than OP-amps do. With discretes you can play many "tricks".

Your discrete schema looks nearly perfect. 2.7ma on the input "tail" , 6.1ma on the VAS ... 2.2k /820-100R on your bias spreader network will go from unbiased to 100ma+. It should work first time - 99% sure of that. :) You might want to throw a 220pf - 390pf cap across R16 as a low pass filter, C2 should be NP (non-polarized 16V: $1 at mouser).

good luck.

OS
 
You might want to throw a 220pf - 390pf cap across R16 as a low pass filter, C2 should be NP (non-polarized 16V: $1 at mouser).

I seem to be getting DC on the output when using a cap across R16(real circuit, not simulated), it's about half a volt with 220pF and about 750mV with 1nF.

I have revised the schematic:

An externally hosted image should be here but it was not working when we last tested it.


Fixed orientation of Q14/Q15(Previously Q15/16, no I'm not deliberately trying to confuse you ;) ).
Added C6 and C7 to improve ripple handling.
Upped R17/18 to 68 Ohms as per suggestion from wahab.
Increased R4 to 1k, just finetuning the bias range.


Real circuit is built on a breadboard, and results gotten from that must be expected to be less than ideal, it does help with rapid experimenting though.

Picture:

An externally hosted image should be here but it was not working when we last tested it.



As you can see I more or less have a huge antenna instead of an amplifier(and believe me, the reception is great, picking up all sorts of nasty hums and cracks, no FM yet though).

Is there any point looking for more PSRR for the circuit? I know the breadboard and wiring is causing most of the issues I've having(mostly humm), unknown how it will perform on a pcb.

I'll probably toss together a pcb this weekend if I can find the time, maybe even two(mono is only fun for a while).

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Kolbjørn
 
I seem to be getting DC on the output when using a cap across R16(real circuit, not simulated), it's about half a volt with 220pF and about 750mV with 1nF.

I have revised the schematic:
I can only think of that you get oscillation with those caps at input.
And this is visable as a voltage at output.
Try to increase compensation cap C4 to 220pF
and see if you get a change
 
I can only think of that you get oscillation with those caps at input.
And this is visable as a voltage at output.
Try to increase compensation cap C4 to 220pF
and see if you get a change

And the winner of the grand prize is lineup!
Upping the miller cap to 220pF helped alot, now I'm ideling on about 50mV DC(still a tad too much for my liking, but taking into account it's a tangle of wires I'm pretty happy with that). And as far as I can tell the sound is excellent, will know more later.

I suppose I could have brought out the scope to actually have had a look at the output, you know, too see if it oscillates :p

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Kolbjørn
 
I have found that the smaller the R17/18 is, the lower the THD, 47 ohms gives 0.1% THD in my simulations and 10-20 ohms reduces THD to 0.05% or less, no resistors gives lowest THD but instead a somewhat unstable amp.

Degeneration should be chosen based on the transistors used. I personally something about 2*re of the transistor.

I'd reduce R7 and R9 to 47-100 ohms.

:yes:

Also a Wilson mirror is a worthwhile use of one more transistor. With 2 more transistors, a Wilson mirror with a base current helper is even better.:)
 
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