I dug up an old project that i put away after one channel developed a 100mV dc offset.
This amplifier used to have a dc offset of like 30mV on both channels, until it was mounted into a chassi and a grounding issue occurred.
The ground issue let some smoke exit both boards but i couldent see where it came from and both boards still worked afterwards but one is now putting out 100mV and the other around 50mV.
I've measured every resistor on both boards and they all measure fine, the smoke did come from the solder side of the board, not the top side so i assume all transistors are working just fine.
If i touch the solder points for the input transistor i can null the dc offset and change it from -100mV to +100mV.
The LTP runs hot on both channels and i cannot see any oscillations unless its up so high that i cant see it with a scope below 500MHz bandwidth.
According to simulation the LTP is passing about 4mA per leg with 2x35V rails.
I tried washing both channels with acetone, soap and hot water and then dry in the oven thinking it may have been flux residue with no luck.
This is the circuit:
http://i.imgur.com/dhoUF.png
Im considering changing the 47ohm resistors to 100ohm and the 22ohm ones to 47ohm and see if that helps.
This amplifier used to have a dc offset of like 30mV on both channels, until it was mounted into a chassi and a grounding issue occurred.
The ground issue let some smoke exit both boards but i couldent see where it came from and both boards still worked afterwards but one is now putting out 100mV and the other around 50mV.
I've measured every resistor on both boards and they all measure fine, the smoke did come from the solder side of the board, not the top side so i assume all transistors are working just fine.
If i touch the solder points for the input transistor i can null the dc offset and change it from -100mV to +100mV.
The LTP runs hot on both channels and i cannot see any oscillations unless its up so high that i cant see it with a scope below 500MHz bandwidth.
According to simulation the LTP is passing about 4mA per leg with 2x35V rails.
I tried washing both channels with acetone, soap and hot water and then dry in the oven thinking it may have been flux residue with no luck.
This is the circuit:
http://i.imgur.com/dhoUF.png
Im considering changing the 47ohm resistors to 100ohm and the 22ohm ones to 47ohm and see if that helps.
Assumption is the mother of all f... ...
Swap those transistors out, they can behave funny when damaged but still seem to "work".
source of the offset
each of the diff pair transistors has, you say, 4 mA of collector current.
Assume beta for one is 200. Then the voltage drop across the 39K input resistor is 0.004/200*39000=0.78. Now, assume the other has beta of 220. The voltage drop across the feedback resistor is 0.004/220*39000=0.709.
The difference is 71 mV. Probably your most significant source of offset is input bias current. You can attack that by either lowering the tail current a lot, or lowering the feedback resistors and input resistors a lot, (maybe making Zin high enough again with bootstrapping).
Note that lowering the tail current to 1 mA still leaves you with 15V/us slew rate, but will improve your input bias current mismatch induced offset by a factor of 8! (current tail current is 8 mA total at present, we propose going to 1 mA total)
each of the diff pair transistors has, you say, 4 mA of collector current.
Assume beta for one is 200. Then the voltage drop across the 39K input resistor is 0.004/200*39000=0.78. Now, assume the other has beta of 220. The voltage drop across the feedback resistor is 0.004/220*39000=0.709.
The difference is 71 mV. Probably your most significant source of offset is input bias current. You can attack that by either lowering the tail current a lot, or lowering the feedback resistors and input resistors a lot, (maybe making Zin high enough again with bootstrapping).
Note that lowering the tail current to 1 mA still leaves you with 15V/us slew rate, but will improve your input bias current mismatch induced offset by a factor of 8! (current tail current is 8 mA total at present, we propose going to 1 mA total)
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check the green LED Vf.
Check the current in the LTP tail.
Check the currents in the two halves of the LTP.
Check the current in the VAS.
Do you mean touch it with your finger? If so, this could be a sign of oscillation. If you are lucky this might show up on an analogue UHF TV with an indoor antenna. A scope probe may kill off any oscillation so not a good test.
The bias current issue raised by djoffe is worth looking at. Did you let any smoke out of the input stage transistors, either LTP or current mirror? This could change a BJT characteristics without totally killing it.
I changed the 100ohm resistors to 470ohms and had the ground issue again but let it smoke for a while so i could locate the source, and found out it was the 220ohm resistor on VAS that got hot.
Then i resoldered the feedback cap and turned the amp on again. Faulty channel is now at -25mV and the other channel wanders around +1mV to -1mV.
Turns out the ground issue was in fact a miniscule solder bridge between ground and the feedback capacitor.
Then i resoldered the feedback cap and turned the amp on again. Faulty channel is now at -25mV and the other channel wanders around +1mV to -1mV.
Turns out the ground issue was in fact a miniscule solder bridge between ground and the feedback capacitor.
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I'm with DF96 - there's a good chance its oscillation. There's a lot of gain in that circuit with CCS current mirrors and buffered VAS. If you can kill it by touching it with a scope probe you can also kill it by adding a small capacitor - options include from the shared bases of the current mirror devices to gnd.
Edit: your post appeared just as I hit 'save', glad to hear it's 'sorted'.
Edit: your post appeared just as I hit 'save', glad to hear it's 'sorted'.
+-1mV could also be just noise on the input.
The current mirror transistors are not face to face, this could also cause fluctuations as warm air rises past them. A little design qwerk.
However the thing have now settled down to 15mV on one channel and 3mV on the other and the heatsink is around 40-50deg C with 100mA bias per channel.
The current mirror transistors are not face to face, this could also cause fluctuations as warm air rises past them. A little design qwerk.
However the thing have now settled down to 15mV on one channel and 3mV on the other and the heatsink is around 40-50deg C with 100mA bias per channel.
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