Veena - An Experimental SRPP Amplifier

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Gathering idea and knowledge from the net I designed this amplifier, still at simulation stage. The VAS and front-end is well-known to me and I have made many amps with these configs, most of which sounded as expected, good.

I used the SRPP config in one of my common-source class-A amps and it was a success both in terms of stability and musicality. But the distortion figures were high at low volume and way too high at high volume. I suspect the single transistor "current feedback" input stage for that.

As a result this time I chose the LTP, and added as much accessories as I could to achieve a fast, accurate and stable input and VAS. I know I can add more parts to make it foolproof but it would become too complex for my liking as I am building a small amp with a mere 15watts output.

Now as I share this circuit with you experts here in diyAudio, I find the output stage very interesting and wonder how it would sound. I remember how the SRPP sounded in the old amp, but that was a common-source with voltage gain, this is common-drain, simply a voltage follower that uses an N and a P MOSFET in the output. The follower itself has given me headaches as I had severe problems understanding how it works.

While simulating I understood something interesting about this output config(all of which I already knew but never tested before).

First is the current sharing between the power MOSFETs with nominal load. When driven within bias (Class-A), the small signal BJT near the lower FET works hard with signal applied, making the lower FET to deliver most of the output current, upper FET does only the lip-sync :D.

Color indication
>>green - upper MOSFET current
>>blue - lower MOSFET current
>>red - total output current

8ohm.png.jpg

Second is the current behavior under low resistance load. When driven higher than bias (Class-AB), the upper FET delivers the required current just as the lower FET bottoms at zero amps, resulting in a funny looking graph showing a crossover behavior which is assymetric IMO. Question, does this crossover induce inharmonic distortion?

4ohm.png.jpg

Third is the unusual distortion spectra, which in fact is the sole reason I am still with this circuit. The amount of distortion at 1KHz@2vPP into 8ohm is very low, and in fact is the lowest amongst all the diy amps I have ever simulated, from Pass F5 to ESP P3A and many in between, SE or PP.

1KHz2V8ohm.png.jpg

Remember this is a simulated circuit I am talking about and I doubt it will measure the same in reality. However, I have bought all the parts except the P-FET and am going to assemble it within 15th of this month.

I took this circuit as a new year experiment and as my first take on the SRPP config. I wonder whether others has experiences with this kind of amps. I see that SRPP is popular in the tube zone, but haven't seen a popular solid-state amp/project using this approach, why is it so? What are the shortcomings of this config? Does SRPP make any difference when comparing common source and common drain config?

I named it Veena coz it was the hardest circuit for me to understand, and as far as I know Veena is the hardest-to-play string instrument. Although what I play isn't a string instrument! Veena produces more harmonics than any string insturment, the circuit seems to do exactly the opposite. :D
 

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current mirrors = high gain LTP. You have no degeneration on the current mirrors, precious little degeneration on the LTP devices and no capacitor from the base junction of the current mirror devices to ground.

No gate stopper on the lower MOSFET and a very small gate stopper on the upper.

I fear instability.
 
Hi Shaan

If you change the output stage as shown below, you'll get equal sharing of the signal current between the Mosfets. The bottom half won't go beyond it's class A limit, though.

With either circuit, you need a resistor in series with the base of Q10 to protect it when the amp is driven beyond class A.

Cheers - Godfrey
 

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Shaan, what you came up with is not a SRPP. It's just a fancy way to do SE (bottom Mosfet) working into CCS (top Mosfet). Q10 is just a helper: it will maintain a nearly constant current for Q12, which will work as a level shifter (buffer) from VAS (by Vgs+Vbe of Q10) to the load. Since the load will take signal current (amperes) with varying voltage on it, Q11 will work to supply THIS current change (under control of Q10). So, Q12 will change its current slightly to
modulate Q10, and, in turn, Q11.
To turn it into SRPP (that is, to have a real 50-50 Push-Pull action)
you will need another 0.25 Ohm resistor from R9 to the base of Q10 (splitting R9 in- half). That will add the missing Shunt Regulation.
You can explore a few other ideas, starting from here (post #3):
http://www.diyaudio.com/forums/solid-state/179195-output-buffers.html#post2399584
but, you are good (very close) with your idea.
People seldom use SRPP because of the misunderstanding of its properties and how it is working. OTOH, you will find plenty of silly circuits published on Internet and in the printed media, using this concept.
The main advantage of SRPP is a favorable dist. spectrum, starting
with 2nd harm., and self phase-splitting action for PP (saving parts
and simplicity), if done properly.
Another good link to study (not, that I will recommend it the way it
is, quite understandably) is here:
Miniature Class A Amplifier
 
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current mirrors = high gain LTP. You have no degeneration on the current mirrors, precious little degeneration on the LTP devices and no capacitor from the base junction of the current mirror devices to ground.

No gate stopper on the lower MOSFET and a very small gate stopper on the upper.

I fear instability.

I agree with all above, you really need some degeneration on the mirrors and on the second VAS stage. As designed you are very dependent on the transconductance of the devices matching for good distortion performance, well matched resistors will remove this dependency and provide some linearization by local feedback. I bet there is some pretty significant temperature dependency in that mirror and the following driver stage as well. Doing this should raise the load impedances seen by the first stage improving linearity there as well.
 
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Joined 2004
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Shaan, what you came up with is not a SRPP. It's just a fancy way to do SE (bottom Mosfet) working into CCS (top Mosfet). Q10 is just a helper: it will maintain a nearly constant current for Q12, which will work as a level shifter (buffer) from VAS (by Vgs+Vbe of Q10) to the load. Since the load will take signal current (amperes) with varying voltage on it, Q11 will work to supply THIS current change (under control of Q10). So, Q12 will change its current slightly to
modulate Q10, and, in turn, Q11.
To turn it into SRPP (that is, to have a real 50-50 Push-Pull action)
you will need another 0.25 Ohm resistor from R9 to the base of Q10 (splitting R9 in- half). That will add the missing Shunt Regulation.
You can explore a few other ideas, starting from here (post #3):
http://www.diyaudio.com/forums/solid-state/179195-output-buffers.html#post2399584
but, you are good (very close) with your idea.
People seldom use SRPP because of the misunderstanding of its properties and how it is working. OTOH, you will find plenty of silly circuits published on Internet and in the printed media, using this concept.
The main advantage of SRPP is a favorable dist. spectrum, starting
with 2nd harm., and self phase-splitting action for PP (saving parts
and simplicity), if done properly.
Another good link to study (not, that I will recommend it the way it
is, quite understandably) is here:
Miniature Class A Amplifier


The top device Q12 I think is nothing more than a follower, the bottom device Q11 and that transistor look to me like a variation on a "ring of two" CCS where the CCS output current is actually modulated by the load current. Not sure if this is where the SRPP supposition comes into play, but I'm wondering the advisability of this configuration as at best it might force a near constant current through Q11? Without further thought it doesn't quite make sense to me.. Were it me I'd use a fixed current CCS on the output.
 
current mirrors = high gain LTP. You have no degeneration on the current mirrors, precious little degeneration on the LTP devices and no capacitor from the base junction of the current mirror devices to ground.

I'm not sure about that capacitor. By putting capacitor there the current mirror becomes CCS. I agree with very slight degeneration with max 100 Ohm resistors. Higher values will leave too little Vce for proper operation of the current mirror.
 
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