Why wouldn't this work?

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so I am playing around with an op-amp based power amp. Here it is.

The design goal is to use CFP OPS to expand the output voltage swing. This way, it wouldn't be limited to the +/- 15v of the op amp. or so I thought.

This is based on the op amp concept of ESP. Changes I have made are:

1) It originally used TL074 and I substituted it with LT1057. Why? LTSpice doesn't have TL074, :).
2) two zeners used to supply +- 15v to the op amp but 26v to the ops.
3) the original "compound pair" ops was replaced with CFP ops with 10x voltage gain (as determined by r2/r12, and r10/r9).
4) I used just 2n5550 and 2n5401 as drivers and output devices to prove the concept.

here is what I got.

the amp works just fine if the overall voltage gain is less 15x, thus staying within the output voltage limit of the opamp.

Higher gains will result in clipping. Namely, the cfp is not providing any voltage gain.

Why?

Thanks in advance.
 

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  • op amp bjt.jpg
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Millwood,

The CFP has a voltage gain of one because of the 100% feedback from second stage collector to first stage emitter. You're seeing performance that's consistent with what the actual circuit will do.

You'll need something along the lines of the schematic in the post referenced below. Note the CE amp driven by the current drawn from the power supply rails of the op amp.

http://www.diyaudio.com/forums/showthread.php?postid=191570#post191570
 
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andy_c said:
Millwood,

The CFP has a voltage gain of one because of the 100% feedback from second stage collector to first stage emitter.


that's what I had suspected. Basically, the feedback pick up is from the emitter of the driver, so that would give a 1x voltage gain. I will toy around with it a little bit to see if I can make it work.

the circuitry you referred is the basic bootstrapping on op amp to expand their output voltage. Part of the reason for me to try a cfp ops is to avoid bootstrapping..
 
If you do end up going with a design using the bootstrapping approach, the op amp models in LTSpice don't handle this case correctly at all. They are the old Boyle macromodels for which the supply current doesn't vary with changes in the load current. It's a constant - totally unrealistic. This can be fixed by downloading Analog Devices models and incorporating them into LTSpice. These models handle the supply current variation with load correctly.
 
"Namely, the cfp is not providing any voltage gain"

Of course not.

If You need any gain just connect the pin between R10, and R12 to the ground, and You can get gain.
But I think I can make some modification with Your schematic:
1, The bias at the output stage is not so stable with this schemaitc. Use small emitter resistors to set the bias.
2, Set the gain of the output stages, and set the bias too. Use small collector resistors for the output devices, and make nfb. from the collectors back to the driver's emitter. Set the gain -say- 2, and the result will be excellent.
3, Use current regulator instead of R11, and R1. This means lower load for the opamp, and lower distortion.

Check this amp:
Power_amp_300W.gif


Sajti
 
PMA said:
millwood,

here is the example of CFP with voltage gain of +1. Please see the difference to your circuit.

Pavel


As I understand millwood want to make some gain with his cfp output. In that case he need to put two more resistors series into this schematic.
Two - say 47ohm- resitors. One between the collector os the Q5 and the emiiter of Q3, and one between the emitter of Q3, and the ground. With this action he has the gain about 2.

Sajti
 
Not egzactly.

Keep the 0R1 resistor. Connect the first pin of 47ohms to the common point of Q5 collector, and R12.
The other part of the Your socend image looks OK.
If You see the amplifier I attached, the 47ohms resitors should be the R38, and R28 for positive , and R41 and R28 for negative part of the circuit.

Sajti
 
Sajti,

unfortunately I cannot see the image you have attached before. What was the format? The original millwoods circuit still has voltage gain of +1 in the output stage, emitter resistor of the driver does not help. The result is emitter follower with current feedback due to power transistor, but still with +1 voltage gain.

I have not exactly understood your explanation how to make a power CFP push-pull stage with gain. Could you attach an image in gif or jpg?

Pavel
 
Yes!!!!! This is the picture I try to explain. The only difference is if You keep the low value resitors between the output terminal, and the collectors of the output stage, they help to stabilize the bias. In that case the feedback resitors (R1, and R3) connected to the collector of the output devices.

Sajti
 
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Joined 2003
thanks guys, it worked!

the only problem I saw is that as the output goes to the negative cycle, current is flowing from the ground, to the emitter resistor on the driver, the feedback resistor connecting the output collector to the driver emitter, and the resistor on the output collector.

it can be contained (but not eliminated) by using a higher feedback resistor but that increases local feedback as well - however, no impact on the overall gain. However, higher feedback resistor also introduces higher cross-over distortion on the driver stage - haven't tried to figure out why.

the following resistors used:

driver emittor resistor: 1K - to limit the current drain on the op-amp;

feedback resistor: 1K. At 10K, there is considerable cross over distortion.

collector resistor on the output: 0.47.

I also used 3 diodes in the diode bias network as well. and the bottom of the diode network is now connected to the negative rail.

I am also playing around with a triplet OPS design but haven't made it to work. Will share with you later.
 
Did You checked the schematics I attached? There is two diodes across the emitter resistors. I don't really understand why, but the text told, they are protection, to avoid output voltage limiting.

"I also used 3 diodes in the diode bias network as well. and the bottom of the diode network is now connected to the negative rail."

Sorry but I can't imagine this:scratch:

Sajti
 
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sajti said:
Did You checked the schematics I attached? There is two diodes across the emitter resistors. I don't really understand why, but the text told, they are protection, to avoid output voltage limiting.


upon reading the above, I did pay attention to it and noticed that my schematics, as of now, still has a limit on output voltage of +/- 25V. it puzzles me a little but I haven't had much time playing with it.


Thanks all of you for your help in getting me on the right track.
 
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