I have a basic electrical engineering background and several years of experience building tube amps. But my curiosity has always extended to the realm of solid state.
My design goal is a power amplifier stage specifically for musical instrument amplification. The requirements are that it can withstand a short circuit or low impedance load, and that the it will saturate in a somewhat pleasing manner when overdriven. I have noticed that some high-power solid state guitar and bass amps blow speakers because the saturation characteristics of the output stage is so poor. My venerable Sunn Beta Bass does not have this problem.
The approach I took is to choose a topology with inherently good stability and comparatively low open loop gain. The output devices are Lateral MOSFETs, driven by a class-AB driver stage. For protection I use a simple VI limiter. Maybe some of you will recognize the basic design as the "El-Cheapo" from Rod Elliott's site, but I have coupled it to a Lateral MOSFET output as compared to the QC output of the 'Cheapo.
I laid out my design on a PCB (will post if requested) and I just can't get it to work right. I can run it at low signal levels, but if I increase the supply voltage to the intended 60V, it squeals. If I increase the signal level to where it starts to clip, it squeals. I've tried substituting different transistors in the input and VA stages, to no avail. The oscillations also seem to be affected by the bias point, being reduced when I bias the outputs hotter.
Any suggestions or comments greatly appreciated. Anything obvious that I'm doing wrong?
My design goal is a power amplifier stage specifically for musical instrument amplification. The requirements are that it can withstand a short circuit or low impedance load, and that the it will saturate in a somewhat pleasing manner when overdriven. I have noticed that some high-power solid state guitar and bass amps blow speakers because the saturation characteristics of the output stage is so poor. My venerable Sunn Beta Bass does not have this problem.
The approach I took is to choose a topology with inherently good stability and comparatively low open loop gain. The output devices are Lateral MOSFETs, driven by a class-AB driver stage. For protection I use a simple VI limiter. Maybe some of you will recognize the basic design as the "El-Cheapo" from Rod Elliott's site, but I have coupled it to a Lateral MOSFET output as compared to the QC output of the 'Cheapo.
I laid out my design on a PCB (will post if requested) and I just can't get it to work right. I can run it at low signal levels, but if I increase the supply voltage to the intended 60V, it squeals. If I increase the signal level to where it starts to clip, it squeals. I've tried substituting different transistors in the input and VA stages, to no avail. The oscillations also seem to be affected by the bias point, being reduced when I bias the outputs hotter.
Any suggestions or comments greatly appreciated. Anything obvious that I'm doing wrong?
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Maybe Q4 screaming in pain?
Looks like with a 60V supply, it could be exceeding it's max power dissipation rating?
R12 is quite a nasty load for the voltage gain stage too. Bootstrapping it would make it much easier for Q4 to drive.
Maybe you could replace R12 with two 2.2K resistors connected in series, then connect the mid-point between them to the output with a 100uF capacitor. That would halve Q4's power dissipation and give it a much easier load to drive.
The oscillation could have something to do with wiring layout, earthing or supply decoupling. Have you got suitable decoupling caps on the pcb close to the output devices?
btw: What is Q1, the input transistor? It's a little unusual to see a mosfet there...
Looks like with a 60V supply, it could be exceeding it's max power dissipation rating?
R12 is quite a nasty load for the voltage gain stage too. Bootstrapping it would make it much easier for Q4 to drive.
Maybe you could replace R12 with two 2.2K resistors connected in series, then connect the mid-point between them to the output with a 100uF capacitor. That would halve Q4's power dissipation and give it a much easier load to drive.
The oscillation could have something to do with wiring layout, earthing or supply decoupling. Have you got suitable decoupling caps on the pcb close to the output devices?
btw: What is Q1, the input transistor? It's a little unusual to see a mosfet there...
Thanks for the feedback (no pun intended)
Q4 is current limited by Q2 to a max current of ~23mA, which will still cook it pretty good at full supply voltage, it will survive (barely) at its quiescent point of half that. Static dissipation is ~400mW, should probably change to a TO-126 package device.
The circuit is constructed on a double-sided PCB with a ground plane. It is not my first PCB layout; I have separated the signal and power sections and decoupled the supply with a large electro with a film cap in parallel. Besides, it's running off a DC bench supply.
I think you are right about the loading on Q4. I have changed Q4 to a compound pair to increase the gain and this helped with the oscillations. Also changing R6 to 2.2k helped. I have taken my goal of low open loop current gain to far to the point that I think it is slew rate limiting.
My plan now is to bootstrap the load of Q4 per godfrey's suggestion, and also change R6 to a JFET current source using J201 with IDSS of ~0.7mA.
Q4 is current limited by Q2 to a max current of ~23mA, which will still cook it pretty good at full supply voltage, it will survive (barely) at its quiescent point of half that. Static dissipation is ~400mW, should probably change to a TO-126 package device.
The circuit is constructed on a double-sided PCB with a ground plane. It is not my first PCB layout; I have separated the signal and power sections and decoupled the supply with a large electro with a film cap in parallel. Besides, it's running off a DC bench supply.
I think you are right about the loading on Q4. I have changed Q4 to a compound pair to increase the gain and this helped with the oscillations. Also changing R6 to 2.2k helped. I have taken my goal of low open loop current gain to far to the point that I think it is slew rate limiting.
My plan now is to bootstrap the load of Q4 per godfrey's suggestion, and also change R6 to a JFET current source using J201 with IDSS of ~0.7mA.
OK, so an update:
So I made the changes I described earlier, changing the load on Q4 to a bootstrap and R6 to a JFET current source. Q4 is changed to a compound pair. I have been using a PNP transistor in place of the MOSFET at the input (Q1). The overall sound is definitely much improved.
I'm still getting oscillations, but they seem to be at a lower frequency than before. After cranking the amp at overload into a 4 ohm speaker, I put my finger on the devices to check for overheating, they are all cold. The amp is mounted on a grossly oversized heatsink so the outputs are cold too.
I might try increasing the value of the gate stop resistors, but they are already 270 ohm, and I used carbon comp resistors (to minimize inductance) mounted as close as possible to the output MOSFET gate terminals.
Does anyone have any past experiences using an emitter-feedback frontend for an amp like this?
So I made the changes I described earlier, changing the load on Q4 to a bootstrap and R6 to a JFET current source. Q4 is changed to a compound pair. I have been using a PNP transistor in place of the MOSFET at the input (Q1). The overall sound is definitely much improved.
I'm still getting oscillations, but they seem to be at a lower frequency than before. After cranking the amp at overload into a 4 ohm speaker, I put my finger on the devices to check for overheating, they are all cold. The amp is mounted on a grossly oversized heatsink so the outputs are cold too.
I might try increasing the value of the gate stop resistors, but they are already 270 ohm, and I used carbon comp resistors (to minimize inductance) mounted as close as possible to the output MOSFET gate terminals.
Does anyone have any past experiences using an emitter-feedback frontend for an amp like this?
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